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[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
8
9 # Status tracking
10
11 move things along from one stage to the next
12
13 ## Currently working on
14
15 - Project Management
16 - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
17 - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
18 - https://bugs.libre-soc.org/show_bug.cgi?id=575
19 - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
21 - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
22 - EUR
23 - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
25 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
31 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
32 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
34 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
35 - shared with cole
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
37 - EUR 50, shared with samuel 10%
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
40 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
41 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
42 - EUR 50, shared with samuel (EUR 350)
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
44 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
45 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
46 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
48 - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
49 - EUR 200
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
52 - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
53 - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
54 - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
55 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
56 - donated
57 - parent #198
58 - EUR 200
59 - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
60 - MultiCompUnit (and Function Units) proof
61 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
62 - donated
63 - parent #195
64
65 ## Completed but not yet submitted:
66
67 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
68 - EUR 150
69 - donated
70 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
71 - EUR 200
72 - donated
73 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
74 - EUR 150
75 - donated
76 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
77 - EUR 200
78 - donated
79 - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
80 - EUR 700
81 - (lip6.fr donated)
82 - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
83 - (total EUR 400 25% donated by LIP6)
84 - EUR 100 lkcl
85 - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
86 - EUR 900
87 - shared with [[lxo]]
88 - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
89 - EUR 1100
90 - shared with lauri, jacob
91 - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
92 - EUR 1250
93 - Shared 50% with Staf
94 - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
95 - EUR 300
96 - Shared with Staf, cole
97 - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
98 - EUR 450
99 - Shared with Staf
100 - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
101 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
102 - EUR 3000
103 - shared with Staf 50%
104 - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
105 - Project 2019-10-043 06dec2020 wishbone
106 - EUR (TBD)
107
108 ### Project 2019-10-029 14mar2020 coriolis2
109
110 - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
111 - (total EUR 100 shared 50% with staf)
112 - EUR 50 lkcl
113 - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
114 - (total EUR 1500 shared 50% with LIP6)
115 - EUR 750 lkcl
116 - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
117 - (total EUR 400 shared 75% with LIP6)
118 - EUR 300 lkcl
119
120 ### Project 2019-02-012 06dec2020 Core
121
122 - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
123 - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
124 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
125 - EUR 750 donated
126 - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
127 - EUR 1500
128
129 ### Project 2019-10-043 06dec2020 wishbone
130
131 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
132 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
133 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
134 - EUR 200
135 - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
136 - EUR 100
137 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
138 - EUR 200
139 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
140 - EUR 100
141 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
142 - EUR 200
143 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
144 - EUR 450
145 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
146 - EUR 100
147 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
148 - EUR 200 donated
149 - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
150 - EUR 250 (share with cole)
151
152 ### Project 2019-10-032 06dec2020 proofs
153
154 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
155 - parent #195
156 - EUR 400 donated
157 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
158 - parent #195
159 - EUR 300 donated
160 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
161 - EUR 400 donated
162 - parent #195
163 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
164 - EUR 400 donated
165 - parent #195
166
167 ## Submitted for NLNet RFP
168
169 submitted but not confirmed paid:
170
171 ### Project 2019-02-012 04sep2020 Core
172
173 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
174 - EUR 2000 total, shared with florent. EUR 1200
175
176 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
177
178 ## Paid
179
180 donation from NLNet confirmed received:
181
182 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
183
184 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
185 - EUR 2000, python POWER9 simulator
186 - Shared 50% with [[mnolan]], EUR 1000
187 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
188 - EUR 250, functions needed for simulator
189 - Shared 20% with [[mnolan]], EUR 50
190
191 ### proofs 2019-10-032
192
193 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
194 - EUR 500 shared 20% samuel, EUR 100
195 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
196 - EUR 300 shared 1/6 [[mnolan]] EUR 50
197 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
198 - EUR 400 shared 25% [[mnolan]] EUR 100
199 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
200 - EUR 150
201
202 ### wishbone 2019-10-043
203
204 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
205 - EUR 500
206 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
207 - EUR 300
208 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
209 - EUR 250
210 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
211 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
212 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
213 - EUR 300
214 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
215 - EUR 400, 50% shared [[programmerjake]] EUR 200
216 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
217 - EUR 750, 33% shared [[programmerjake]] EUR 250
218 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
219 - EUR 200 50% shared, cole, EUR 100
220 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
221 - EUR 200
222 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
223 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
224 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
225 - EUR 150
226 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
227 - EUR 400 shared 50% [[mnolan]] EUR 200
228 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
229 - EUR 250 shared 40% [[mnolan]] EUR 100
230 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
231 - EUR 300 shared 1/3 [[mnolan]] EUR 100
232 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
233 - EUR 300 shared 50% [[mnolan]] EUR 150
234 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
235 - EUR 750
236 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
237 - EUR 100
238 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
239 - EUR 100
240 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
241 - EUR 100
242 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
243 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
244
245 ### Project 2019-02-012 28-apr-2020
246
247 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
248 - 6600 scoreboard multi-read/write
249 - EUR 600
250 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
251 - Partitioned equals and greater than comparison
252 - Shared 50% with [[mnolan]]
253 - EUR 200 (each)
254 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
255 - partitioned scalar/vector shift
256 - Shared 50% with [[lkcl]]
257 - EUR 350 (each)
258
259 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
260
261 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
262 - auto-parser of POWER9
263 - Shared 50% with [[mnolan]]
264 - EUR 500 (each)
265
266 ### Project 2019-10-029 Date 14mar2020
267
268 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
269 - EUR 1200
270
271 ### Project 2019-02-012 Date 12mar2020
272
273 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
274 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
275 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
276 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
277
278 ### Project 2019-02-012 Date 28jan2020
279
280 * admin tasks
281 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
282