lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  22    - EUR 250
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  24    - EUR 1250
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  34  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  38    - EUR
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  43  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  44  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  47    - shared with cole
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  49    - EUR 50, shared with samuel 10%
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  54    - EUR 50, shared with samuel (EUR 350)
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  60    - EUR 200
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  63    - donated
  64    - parent #198
  65    - EUR 200
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  67   - MultiCompUnit (and Function Units) proof
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  69   - donated
  70   - parent #195
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  72
  73 ## Completed but not yet submitted:
  74
  75 TO SORT
  76
  77  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
  78    - EUR 1600
  79    - EUR 800 shared with [[klehman]]
  80    - EUR 800 shared with [[lkcl]]
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  82    - EUR 800
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  87    - EUR 500
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  93
  94
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  96    - EUR 150
  97    - donated
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  99    - EUR 200
 100    - donated
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 102    - EUR 150
 103    - donated
 104  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 105    - EUR 200
 106    - donated
 107  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 108    - EUR 700
 109    - (lip6.fr donated)
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 111    - (total EUR 400 25% donated by LIP6)
 112    - EUR 100 lkcl
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 114    - EUR 900
 115    - shared with [[lxo]]
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 117    - EUR 1100
 118    - shared with lauri, jacob
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 120    - EUR 1250
 121    - Shared 50% with Staf
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 123    - EUR 300
 124    - Shared with Staf, cole
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 126    - EUR 450
 127    - Shared with Staf
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 130    - Project 2019-10-043 06dec2020 wishbone
 131    - EUR (TBD)
 132
 133 ### Project 2019-10-029 14mar2020 coriolis2
 134
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 136    - (total EUR 100 shared 50% with staf)
 137    - EUR 50 lkcl
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 139    - (total EUR 1500 shared 50% with LIP6)
 140    - EUR 750 lkcl
 141  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 142    - (total EUR 400 shared 75% with LIP6)
 143    - EUR 300 lkcl
 144
 145 ### Project 2019-02-012 06dec2020 Core
 146
 147  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 148    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 149  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 150    - EUR 750 donated
 151  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 152    - EUR 1500
 153
 154 ### Project 2019-10-043 06dec2020 wishbone
 155
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 157    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 159    - EUR 200
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 161    - EUR 100
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 163    - EUR 200
 164  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 165    - EUR 100
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 167    - EUR 200
 168  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 169    - EUR 450
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 171    - EUR 100
 172  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 173    - EUR 200 donated
 174  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 175    - EUR 250 (share with cole)
 176
 177 ### Project 2019-10-032 06dec2020 proofs
 178
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 180    - parent #195
 181    - EUR 400 donated
 182  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 183    - parent #195
 184    - EUR 300 donated
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 186    - EUR 400 donated
 187    - parent #195
 188  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 189    - EUR 400 donated
 190    - parent #195
 191
 192 ## Submitted for NLNet RFP
 193
 194 submitted 2021-dec-09 but not confirmed paid
 195
 196  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 197    - EUR 300
 198  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 199    - EUR 250
 200  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 202  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 203    - EUR 800 shared between:
 204    - EUR 500 [[lkcl]]
 205    - EUR 300 [[tplaten]]
 206  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 207    - EUR 5500 shared between:
 208    - EUR 3850 lkcl
 209    - EUR 1650 Others
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 211    - EUR 1600
 212  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 213    - EUR 600
 214  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 215    - EUR 500 shared between:
 216    - EUR 100 [[lkcl]]
 217    - EUR 325 dmitry
 218    - EUR 75 maciej
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 220
 221
 222 ### Project 2019-02-012 04sep2020 Core
 223
 224  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 225    - EUR 2000 total, shared with florent.  EUR 1200
 226
 227 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 228
 229 ## Paid
 230
 231 donation from NLNet confirmed received:
 232
 233 ### coriolis2 2021-apr-04
 234
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 236    - EUR 3000
 237    - shared with Staf 50%
 238
 239 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 240
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 242     - EUR 2000, python POWER9 simulator
 243     - Shared 50% with [[mnolan]], EUR 1000
 244  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 245     - EUR 250, functions needed for simulator
 246     - Shared 20% with [[mnolan]], EUR 50
 247
 248 ### proofs 2019-10-032
 249
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 251    - EUR 500 shared 20% samuel, EUR 100
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 253    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 255    - EUR 400 shared 25% [[mnolan]] EUR 100
 256  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 257    - EUR 150
 258
 259 ### wishbone 2019-10-043
 260
 261  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 262    - EUR 500
 263  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 264     - EUR 300
 265  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 266     - EUR 250
 267  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 268    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 269  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 270    - EUR 300
 271  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 272    - EUR 400, 50% shared [[programmerjake]] EUR 200
 273  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 274    - EUR 750, 33% shared [[programmerjake]] EUR 250
 275  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 276    - EUR 200 50% shared, cole, EUR 100
 277  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 278    - EUR 200
 279  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 280    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 281  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 282    - EUR 150
 283  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 284    - EUR 400 shared 50% [[mnolan]] EUR 200
 285  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 286    - EUR 250 shared 40% [[mnolan]] EUR 100
 287  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 288    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 289  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 290    - EUR 300 shared 50% [[mnolan]] EUR 150
 291  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 292    - EUR 750
 293  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 294   - EUR 100
 295  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 296   - EUR 100
 297  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 298    - EUR 100
 299  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 300    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 301
 302 ### Project 2019-02-012 28-apr-2020
 303
 304  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 305    - 6600 scoreboard multi-read/write
 306    - EUR 600
 307  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 308    - Partitioned equals and greater than comparison
 309    - Shared 50% with [[mnolan]]
 310    - EUR 200 (each)
 311  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 312    - partitioned scalar/vector shift
 313    - Shared 50% with [[lkcl]]
 314    - EUR 350 (each)
 315
 316 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 317
 318  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 319     - auto-parser of POWER9
 320     - Shared 50% with [[mnolan]]
 321     - EUR 500 (each)
 322
 323 ### Project 2019-10-029 Date 14mar2020
 324
 325 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 326   - EUR 1200
 327
 328 ### Project 2019-02-012 Date 12mar2020
 329
 330 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 331 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 332 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 333 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 334
 335 ### Project 2019-02-012 Date 28jan2020
 336
 337 * admin tasks
 338 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 339