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[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7
8 # Status tracking
9
10 move things along from one stage to the next
11
12 ## Currently working on
13
14 - Project Management
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix (check if already RFPd)
16 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
17 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
19 - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
21 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
22 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
23 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
25 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
26 - shared with cole
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
28 - EUR 50, shared with samuel 10%
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
33 - EUR 50, shared with samuel (EUR 350)
34 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
39 - EUR 400 shared 25% [[mnolan]] EUR 100
40 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
41 - EUR 500 shared [[mnolan]] samuel, TBD split
42 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
44 - EUR 200
45 - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
46 - EUR 250 (share with cole)
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
48 - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
52 - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
53
54 ## Completed but not yet submitted:
55
56 - <https://bugs.libre-soc.org/show_bug.cgi?id=148> pipeline API
57 - EUR 1500
58 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
59 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
60 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
61 - EUR 200
62 - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
63 - EUR 100
64 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
65 - EUR 200
66 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
67 - EUR 100
68 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
69 - EUR 200
70 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
71 - EUR 450
72 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
73 - EUR 100
74 - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
75
76 donated:
77
78 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
79 - with [[lkcl]]
80 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
81 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
82 - functions needed for simulator
83 - Shared 90% with [[lkcl]]
84 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
85 - Formal proof of decoder
86 - EUR 200
87 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
88 - POWER9 ALU proof
89 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
90 - POWER9 CR proof
91 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
92 - POWER9 BRANCH proof
93 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
94 - POWER9 LOGICAL proof
95 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
96 - POWER9 ROTATE proof
97 - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
98 - MultiCompUnit (and Function Units) proof
99
100 ## Submitted for NLNet RFP
101
102 submitted but not confirmed paid:
103
104 ### Project 2019-02-012 04sep2020 Core
105
106 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
107 - EUR 2000 total, shared with florent. EUR 1200
108
109 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
110
111 ## Paid
112
113 donation from NLNet confirmed received:
114
115 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
116
117 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
118 - EUR 2000, python POWER9 simulator
119 - Shared 50% with [[mnolan]], EUR 1000
120 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
121 - EUR 250, functions needed for simulator
122 - Shared 20% with [[mnolan]], EUR 50
123
124 #### proofs 2019-10-032
125
126 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
127 - EUR 500 shared 20% samuel, EUR 100
128 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
129 - EUR 300 shared 1/6 [[mnolan]] EUR 50
130 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
131 - EUR 400 shared 25% [[mnolan]] EUR 100
132 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
133 - EUR 150
134
135 ### wishbone 2019-10-043
136
137 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
138 - EUR 500
139 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
140 - EUR 300
141 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
142 - EUR 250
143 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
144 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
145 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
146 - EUR 300
147 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
148 - EUR 400, 50% shared [[programmerjake]] EUR 200
149 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
150 - EUR 750, 33% shared [[programmerjake]] EUR 250
151 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
152 - EUR 200 50% shared, cole, EUR 100
153 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
154 - EUR 200
155 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
156 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
157 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
158 - EUR 150
159 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
160 - EUR 400 shared 50% [[mnolan]] EUR 200
161 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
162 - EUR 250 shared 40% [[mnolan]] EUR 100
163 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
164 - EUR 300 shared 1/3 [[mnolan]] EUR 100
165 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
166 - EUR 300 shared 50% [[mnolan]] EUR 150
167 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
168 - EUR 750
169 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
170 - EUR 100
171 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
172 - EUR 100
173 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
174 - EUR 100
175 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
176 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
177
178 ### Project 2019-02-012 28-apr-2020
179
180 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
181 - 6600 scoreboard multi-read/write
182 - EUR 600
183 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
184 - Partitioned equals and greater than comparison
185 - Shared 50% with [[mnolan]]
186 - EUR 200 (each)
187 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
188 - partitioned scalar/vector shift
189 - Shared 50% with [[lkcl]]
190 - EUR 350 (each)
191
192 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
193
194 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
195 - auto-parser of POWER9
196 - Shared 50% with [[mnolan]]
197 - EUR 500 (each)
198
199 ### Project 2019-10-029 Date 14mar2020
200
201 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
202
203 ### Project 2019-02-012 Date 12mar2020
204
205 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
206 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
207 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
208 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
209
210 ### Project 2019-02-012 Date 28jan2020
211
212 * admin tasks
213 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
214