lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  26  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  30    - EUR
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  35  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  36  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  39    - shared with cole
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  41    - EUR 50, shared with samuel 10%
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  46    - EUR 50, shared with samuel (EUR 350)
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  52    - EUR 200
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  55    - donated
  56    - parent #198
  57    - EUR 200
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  59   - MultiCompUnit (and Function Units) proof
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  61   - donated
  62   - parent #195
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  64
  65 ## Completed but not yet submitted:
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
  67    - EUR 500 shared between:
  68    - EUR 100 [[lkcl]]
  69    - EUR 325 dmitry
  70    - EUR 75 maciej
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  72    - EUR 800
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  77    - EUR 800 shared between:
  78    - EUR 500 [[lkcl]]
  79    - EUR 300 [[tplaten]]
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  81    - EUR 5500 shared between:
  82    - EUR 3850 lkcl
  83    - EUR 1650 Others
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  85    - EUR 1600
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
  87    - EUR 600
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  89    - EUR 500
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  93  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  95
  96
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  98    - EUR 150
  99    - donated
 100  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 101    - EUR 200
 102    - donated
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 104    - EUR 150
 105    - donated
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 107    - EUR 200
 108    - donated
 109  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 110    - EUR 700
 111    - (lip6.fr donated)
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 113    - (total EUR 400 25% donated by LIP6)
 114    - EUR 100 lkcl
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 116    - EUR 900
 117    - shared with [[lxo]]
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 119    - EUR 1100
 120    - shared with lauri, jacob
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 122    - EUR 1250
 123    - Shared 50% with Staf
 124  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 125    - EUR 300
 126    - Shared with Staf, cole
 127  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 128    - EUR 450
 129    - Shared with Staf
 130  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 132    - EUR 3000
 133    - shared with Staf 50%
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 135    - Project 2019-10-043 06dec2020 wishbone
 136    - EUR (TBD)
 137
 138 ### Project 2019-10-029 14mar2020 coriolis2
 139
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 141    - (total EUR 100 shared 50% with staf)
 142    - EUR 50 lkcl
 143  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 144    - (total EUR 1500 shared 50% with LIP6)
 145    - EUR 750 lkcl
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 147    - (total EUR 400 shared 75% with LIP6)
 148    - EUR 300 lkcl
 149
 150 ### Project 2019-02-012 06dec2020 Core
 151
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 153    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 154  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 155    - EUR 750 donated
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 157    - EUR 1500
 158
 159 ### Project 2019-10-043 06dec2020 wishbone
 160
 161  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 162    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 163  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 164    - EUR 200
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 166    - EUR 100
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 168    - EUR 200
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 170    - EUR 100
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 172    - EUR 200
 173  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 174    - EUR 450
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 176    - EUR 100
 177  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 178    - EUR 200 donated
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 180    - EUR 250 (share with cole)
 181
 182 ### Project 2019-10-032 06dec2020 proofs
 183
 184  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 185    - parent #195
 186    - EUR 400 donated
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 188    - parent #195
 189    - EUR 300 donated
 190  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 191    - EUR 400 donated
 192    - parent #195
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 194    - EUR 400 donated
 195    - parent #195
 196
 197 ## Submitted for NLNet RFP
 198
 199 submitted but not confirmed paid:
 200
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 202
 203 ### Project 2019-02-012 04sep2020 Core
 204
 205  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 206    - EUR 2000 total, shared with florent.  EUR 1200
 207
 208 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 209
 210 ## Paid
 211
 212 donation from NLNet confirmed received:
 213
 214 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 215
 216  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 217     - EUR 2000, python POWER9 simulator
 218     - Shared 50% with [[mnolan]], EUR 1000
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 220     - EUR 250, functions needed for simulator
 221     - Shared 20% with [[mnolan]], EUR 50
 222
 223 ### proofs 2019-10-032
 224
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 226    - EUR 500 shared 20% samuel, EUR 100
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 228    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 230    - EUR 400 shared 25% [[mnolan]] EUR 100
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 232    - EUR 150
 233
 234 ### wishbone 2019-10-043
 235
 236  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 237    - EUR 500
 238  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 239     - EUR 300
 240  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 241     - EUR 250
 242  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 243    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 244  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 245    - EUR 300
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 247    - EUR 400, 50% shared [[programmerjake]] EUR 200
 248  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 249    - EUR 750, 33% shared [[programmerjake]] EUR 250
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 251    - EUR 200 50% shared, cole, EUR 100
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 253    - EUR 200
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 255    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 256  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 257    - EUR 150
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 259    - EUR 400 shared 50% [[mnolan]] EUR 200
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 261    - EUR 250 shared 40% [[mnolan]] EUR 100
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 263    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 265    - EUR 300 shared 50% [[mnolan]] EUR 150
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 267    - EUR 750
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 269   - EUR 100
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 271   - EUR 100
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 273    - EUR 100
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 275    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 276
 277 ### Project 2019-02-012 28-apr-2020
 278
 279  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 280    - 6600 scoreboard multi-read/write
 281    - EUR 600
 282  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 283    - Partitioned equals and greater than comparison
 284    - Shared 50% with [[mnolan]]
 285    - EUR 200 (each)
 286  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 287    - partitioned scalar/vector shift
 288    - Shared 50% with [[lkcl]]
 289    - EUR 350 (each)
 290
 291 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 292
 293  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 294     - auto-parser of POWER9
 295     - Shared 50% with [[mnolan]]
 296     - EUR 500 (each)
 297
 298 ### Project 2019-10-029 Date 14mar2020
 299
 300 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 301   - EUR 1200
 302
 303 ### Project 2019-02-012 Date 12mar2020
 304
 305 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 306 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 307 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 308 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 309
 310 ### Project 2019-02-012 Date 28jan2020
 311
 312 * admin tasks
 313 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 314