lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  28  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  32    - EUR
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  37  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  38  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  41    - shared with cole
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  43    - EUR 50, shared with samuel 10%
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  48    - EUR 50, shared with samuel (EUR 350)
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  54    - EUR 200
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  57    - donated
  58    - parent #198
  59    - EUR 200
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  61   - MultiCompUnit (and Function Units) proof
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  63   - donated
  64   - parent #195
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  66
  67 ## Completed but not yet submitted:
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
  69    - EUR 1600
  70    - EUR 800 shared with [[klehman]]
  71    - EUR 800 shared with [[lkcl]]
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
  73    - EUR 500 shared between:
  74    - EUR 100 [[lkcl]]
  75    - EUR 325 dmitry
  76    - EUR 75 maciej
  77  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  78    - EUR 800
  79  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  83    - EUR 800 shared between:
  84    - EUR 500 [[lkcl]]
  85    - EUR 300 [[tplaten]]
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  87    - EUR 5500 shared between:
  88    - EUR 3850 lkcl
  89    - EUR 1650 Others
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  91    - EUR 1600
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
  93    - EUR 600
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  95    - EUR 500
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  99  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 100  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 101
 102
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 104    - EUR 150
 105    - donated
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 107    - EUR 200
 108    - donated
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 110    - EUR 150
 111    - donated
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 113    - EUR 200
 114    - donated
 115  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 116    - EUR 700
 117    - (lip6.fr donated)
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 119    - (total EUR 400 25% donated by LIP6)
 120    - EUR 100 lkcl
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 122    - EUR 900
 123    - shared with [[lxo]]
 124  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 125    - EUR 1100
 126    - shared with lauri, jacob
 127  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 128    - EUR 1250
 129    - Shared 50% with Staf
 130  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 131    - EUR 300
 132    - Shared with Staf, cole
 133  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 134    - EUR 450
 135    - Shared with Staf
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 138    - EUR 3000
 139    - shared with Staf 50%
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 141    - Project 2019-10-043 06dec2020 wishbone
 142    - EUR (TBD)
 143
 144 ### Project 2019-10-029 14mar2020 coriolis2
 145
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 147    - (total EUR 100 shared 50% with staf)
 148    - EUR 50 lkcl
 149  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 150    - (total EUR 1500 shared 50% with LIP6)
 151    - EUR 750 lkcl
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 153    - (total EUR 400 shared 75% with LIP6)
 154    - EUR 300 lkcl
 155
 156 ### Project 2019-02-012 06dec2020 Core
 157
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 159    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 160  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 161    - EUR 750 donated
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 163    - EUR 1500
 164
 165 ### Project 2019-10-043 06dec2020 wishbone
 166
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 168    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 170    - EUR 200
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 172    - EUR 100
 173  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 174    - EUR 200
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 176    - EUR 100
 177  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 178    - EUR 200
 179  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 180    - EUR 450
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 182    - EUR 100
 183  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 184    - EUR 200 donated
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 186    - EUR 250 (share with cole)
 187
 188 ### Project 2019-10-032 06dec2020 proofs
 189
 190  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 191    - parent #195
 192    - EUR 400 donated
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 194    - parent #195
 195    - EUR 300 donated
 196  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 197    - EUR 400 donated
 198    - parent #195
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 200    - EUR 400 donated
 201    - parent #195
 202
 203 ## Submitted for NLNet RFP
 204
 205 submitted but not confirmed paid:
 206
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 208
 209 ### Project 2019-02-012 04sep2020 Core
 210
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 212    - EUR 2000 total, shared with florent.  EUR 1200
 213
 214 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 215
 216 ## Paid
 217
 218 donation from NLNet confirmed received:
 219
 220 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 221
 222  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 223     - EUR 2000, python POWER9 simulator
 224     - Shared 50% with [[mnolan]], EUR 1000
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 226     - EUR 250, functions needed for simulator
 227     - Shared 20% with [[mnolan]], EUR 50
 228
 229 ### proofs 2019-10-032
 230
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 232    - EUR 500 shared 20% samuel, EUR 100
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 234    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 236    - EUR 400 shared 25% [[mnolan]] EUR 100
 237  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 238    - EUR 150
 239
 240 ### wishbone 2019-10-043
 241
 242  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 243    - EUR 500
 244  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 245     - EUR 300
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 247     - EUR 250
 248  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 249    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 251    - EUR 300
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 253    - EUR 400, 50% shared [[programmerjake]] EUR 200
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 255    - EUR 750, 33% shared [[programmerjake]] EUR 250
 256  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 257    - EUR 200 50% shared, cole, EUR 100
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 259    - EUR 200
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 261    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 263    - EUR 150
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 265    - EUR 400 shared 50% [[mnolan]] EUR 200
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 267    - EUR 250 shared 40% [[mnolan]] EUR 100
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 269    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 271    - EUR 300 shared 50% [[mnolan]] EUR 150
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 273    - EUR 750
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 275   - EUR 100
 276  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 277   - EUR 100
 278  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 279    - EUR 100
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 281    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 282
 283 ### Project 2019-02-012 28-apr-2020
 284
 285  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 286    - 6600 scoreboard multi-read/write
 287    - EUR 600
 288  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 289    - Partitioned equals and greater than comparison
 290    - Shared 50% with [[mnolan]]
 291    - EUR 200 (each)
 292  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 293    - partitioned scalar/vector shift
 294    - Shared 50% with [[lkcl]]
 295    - EUR 350 (each)
 296
 297 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 298
 299  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 300     - auto-parser of POWER9
 301     - Shared 50% with [[mnolan]]
 302     - EUR 500 (each)
 303
 304 ### Project 2019-10-029 Date 14mar2020
 305
 306 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 307   - EUR 1200
 308
 309 ### Project 2019-02-012 Date 12mar2020
 310
 311 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 312 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 313 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 314 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 315
 316 ### Project 2019-02-012 Date 28jan2020
 317
 318 * admin tasks
 319 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 320