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[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7
8 # Status tracking
9
10 move things along from one stage to the next
11
12 ## Currently working on
13
14 - Project Management
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
16 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
17 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
19 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
21 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
22 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
23 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
25 - shared with cole
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
27 - EUR 50, shared with samuel 10%
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
32 - EUR 50, shared with samuel (EUR 350)
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
34 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
38 - EUR 400 shared 25% [[mnolan]] EUR 100
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
40 - EUR 500 shared [[mnolan]] samuel, TBD split
41 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
42 - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
43 - EUR 200
44 - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
45 - EUR 250 (share with cole)
46 - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
48 - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
51
52 ## Completed but not yet submitted:
53
54 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
55 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
56 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
57 - EUR 200
58 - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
59 - EUR 100
60 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
61 - EUR 200
62 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
63 - EUR 100
64 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
65 - EUR 200
66 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
67 - EUR 450
68 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
69 - EUR 100
70 - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
71
72 donated:
73
74 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
75 - with [[lkcl]]
76 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
77 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
78 - functions needed for simulator
79 - Shared 90% with [[lkcl]]
80 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
81 - Formal proof of decoder
82 - EUR 200
83 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
84 - POWER9 ALU proof
85 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
86 - POWER9 CR proof
87 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
88 - POWER9 BRANCH proof
89 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
90 - POWER9 LOGICAL proof
91 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
92 - POWER9 ROTATE proof
93 - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
94 - MultiCompUnit (and Function Units) proof
95
96 ## Submitted for NLNet RFP
97
98 submitted but not confirmed paid:
99
100 ### Project 2019-02-012 04sep2020 Core
101
102 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
103 - EUR 2000 total, shared with florent. EUR 1200
104
105 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
106
107 ## Paid
108
109 donation from NLNet confirmed received:
110
111 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
112
113 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
114 - EUR 2000, python POWER9 simulator
115 - Shared 50% with [[mnolan]], EUR 1000
116 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
117 - EUR 250, functions needed for simulator
118 - Shared 20% with [[mnolan]], EUR 50
119
120 #### proofs 2019-10-032
121
122 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
123 - EUR 500 shared 20% samuel, EUR 100
124 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
125 - EUR 300 shared 1/6 [[mnolan]] EUR 50
126 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
127 - EUR 400 shared 25% [[mnolan]] EUR 100
128 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
129 - EUR 150
130
131 ### wishbone 2019-10-043
132
133 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
134 - EUR 500
135 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
136 - EUR 300
137 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
138 - EUR 250
139 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
140 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
141 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
142 - EUR 300
143 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
144 - EUR 400, 50% shared [[programmerjake]] EUR 200
145 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
146 - EUR 750, 33% shared [[programmerjake]] EUR 250
147 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
148 - EUR 200 50% shared, cole, EUR 100
149 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
150 - EUR 200
151 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
152 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
153 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
154 - EUR 150
155 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
156 - EUR 400 shared 50% [[mnolan]] EUR 200
157 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
158 - EUR 250 shared 40% [[mnolan]] EUR 100
159 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
160 - EUR 300 shared 1/3 [[mnolan]] EUR 100
161 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
162 - EUR 300 shared 50% [[mnolan]] EUR 150
163 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
164 - EUR 750
165 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
166 - EUR 100
167 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
168 - EUR 100
169 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
170 - EUR 100
171 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
172 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
173
174 ### Project 2019-02-012 28-apr-2020
175
176 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
177 - 6600 scoreboard multi-read/write
178 - EUR 600
179 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
180 - Partitioned equals and greater than comparison
181 - Shared 50% with [[mnolan]]
182 - EUR 200 (each)
183 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
184 - partitioned scalar/vector shift
185 - Shared 50% with [[lkcl]]
186 - EUR 350 (each)
187
188 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
189
190 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
191 - auto-parser of POWER9
192 - Shared 50% with [[mnolan]]
193 - EUR 500 (each)
194
195 ### Project 2019-10-029 Date 14mar2020
196
197 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
198
199 ### Project 2019-02-012 Date 12mar2020
200
201 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
202 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
203 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
204 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
205
206 ### Project 2019-02-012 Date 28jan2020
207
208 * admin tasks
209 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
210