lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
  24    - EUR 150
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
  26    - EUR 150
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
  28    - EUR 1000
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  31    - EUR 250
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  33    - EUR 1250
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  43  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  47    - EUR
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  52  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  53  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  56    - shared with cole
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  58    - EUR 50, shared with samuel 10%
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  60
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  63    - EUR 50, shared with samuel (EUR 350)
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  69    - EUR 200
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  72    - donated
  73    - parent #198
  74    - EUR 200
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  76   - MultiCompUnit (and Function Units) proof
  77  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  78   - donated
  79   - parent #195
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  81
  82 ## Completed but not yet submitted:
  83
  84 TO SORT
  85
  86 28feb2022
  87
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
  89    * EUR 1500 (shared with [[tplaten]])
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
  91    * EUR 1500 (shared with [[tplaten]])
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
  93    * EUR 1000 (shared with [[tplaten]])
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
  95    * EUR 500 (shared with [[programmerjake]])
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  97    * EUR 400 (shared with [[programmerjake]])
  98
  99 before that
 100
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
 102    - EUR 1600
 103    - EUR 800 shared with [[klehman]]
 104    - EUR 800 shared with [[lkcl]]
 105  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
 106    - EUR 800
 107  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 111    - EUR 500
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 117
 118
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 120    - EUR 150
 121    - donated
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 123    - EUR 200
 124    - donated
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 126    - EUR 150
 127    - donated
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 129    - EUR 200
 130    - donated
 131  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 132    - EUR 700
 133    - (lip6.fr donated)
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 135    - (total EUR 400 25% donated by LIP6)
 136    - EUR 100 lkcl
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 138    - EUR 900
 139    - shared with [[lxo]]
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 141    - EUR 1100
 142    - shared with lauri, jacob
 143  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 144    - EUR 1250
 145    - Shared 50% with Staf
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 147    - EUR 300
 148    - Shared with Staf, cole
 149  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 150    - EUR 450
 151    - Shared with Staf
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 153  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 154    - Project 2019-10-043 06dec2020 wishbone
 155    - EUR (TBD)
 156
 157 ### Project 2019-10-029 14mar2020 coriolis2
 158
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 160    - (total EUR 100 shared 50% with staf)
 161    - EUR 50 lkcl
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 163    - (total EUR 1500 shared 50% with LIP6)
 164    - EUR 750 lkcl
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 166    - (total EUR 400 shared 75% with LIP6)
 167    - EUR 300 lkcl
 168
 169 ### Project 2019-02-012 06dec2020 Core
 170
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 172    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 173  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 174    - EUR 750 donated
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 176    - EUR 1500
 177
 178 ### Project 2019-10-043 06dec2020 wishbone
 179
 180  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 181    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 182  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 183    - EUR 200
 184  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 185    - EUR 100
 186  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 187    - EUR 200
 188  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 189    - EUR 100
 190  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 191    - EUR 200
 192  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 193    - EUR 450
 194  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 195    - EUR 100
 196  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 197    - EUR 200 donated
 198  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 199    - EUR 250 (share with cole)
 200
 201 ### Project 2019-10-032 06dec2020 proofs
 202
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 204    - parent #195
 205    - EUR 400 donated
 206  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 207    - parent #195
 208    - EUR 300 donated
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 210    - EUR 400 donated
 211    - parent #195
 212  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 213    - EUR 400 donated
 214    - parent #195
 215
 216 ## Submitted for NLNet RFP
 217
 218 submitted 2021-dec-09 but not confirmed paid
 219
 220  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 221    - EUR 300
 222  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 223    - EUR 250
 224  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 226  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 227    - EUR 800 shared between:
 228    - EUR 500 [[lkcl]]
 229    - EUR 300 [[tplaten]]
 230  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 231    - EUR 5500 shared between:
 232    - EUR 3850 lkcl
 233    - EUR 1650 Others
 234  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 235    - EUR 1600
 236  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 237    - EUR 600
 238  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 239    - EUR 500 shared between:
 240    - EUR 100 [[lkcl]]
 241    - EUR 325 dmitry
 242    - EUR 75 maciej
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 244
 245
 246 ### Project 2019-02-012 04sep2020 Core
 247
 248  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 249    - EUR 2000 total, shared with florent.  EUR 1200
 250
 251 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 252
 253 ## Paid
 254
 255 donation from NLNet confirmed received:
 256
 257 ### coriolis2 2021-apr-04
 258
 259  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 260    - EUR 3000
 261    - shared with Staf 50%
 262
 263 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 264
 265  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 266     - EUR 2000, python POWER9 simulator
 267     - Shared 50% with [[mnolan]], EUR 1000
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 269     - EUR 250, functions needed for simulator
 270     - Shared 20% with [[mnolan]], EUR 50
 271
 272 ### proofs 2019-10-032
 273
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 275    - EUR 500 shared 20% samuel, EUR 100
 276  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 277    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 278  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 279    - EUR 400 shared 25% [[mnolan]] EUR 100
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 281    - EUR 150
 282
 283 ### wishbone 2019-10-043
 284
 285  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 286    - EUR 500
 287  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 288     - EUR 300
 289  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 290     - EUR 250
 291  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 292    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 293  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 294    - EUR 300
 295  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 296    - EUR 400, 50% shared [[programmerjake]] EUR 200
 297  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 298    - EUR 750, 33% shared [[programmerjake]] EUR 250
 299  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 300    - EUR 200 50% shared, cole, EUR 100
 301  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 302    - EUR 200
 303  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 304    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 305  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 306    - EUR 150
 307  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 308    - EUR 400 shared 50% [[mnolan]] EUR 200
 309  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 310    - EUR 250 shared 40% [[mnolan]] EUR 100
 311  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 312    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 313  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 314    - EUR 300 shared 50% [[mnolan]] EUR 150
 315  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 316    - EUR 750
 317  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 318   - EUR 100
 319  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 320   - EUR 100
 321  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 322    - EUR 100
 323  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 324    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 325
 326 ### Project 2019-02-012 28-apr-2020
 327
 328  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 329    - 6600 scoreboard multi-read/write
 330    - EUR 600
 331  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 332    - Partitioned equals and greater than comparison
 333    - Shared 50% with [[mnolan]]
 334    - EUR 200 (each)
 335  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 336    - partitioned scalar/vector shift
 337    - Shared 50% with [[lkcl]]
 338    - EUR 350 (each)
 339
 340 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 341
 342  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 343     - auto-parser of POWER9
 344     - Shared 50% with [[mnolan]]
 345     - EUR 500 (each)
 346
 347 ### Project 2019-10-029 Date 14mar2020
 348
 349 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 350   - EUR 1200
 351
 352 ### Project 2019-02-012 Date 12mar2020
 353
 354 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 355 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 356 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 357 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 358
 359 ### Project 2019-02-012 Date 28jan2020
 360
 361 * admin tasks
 362 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 363