lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=240> ISANS letter
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=238> Compressed writeup
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=858> SVP64 Primer
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=867> svindex
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> binutils draft instructions
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=533> cr int draft instructions
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=251> 3D MESA
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
  31    - EUR 150
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
  33    - EUR 150
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
  35    - EUR 1000
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  38    - EUR 250
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  40    - EUR 1250
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  50  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  54    - EUR
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  59  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  60  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  63    - shared with cole
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  65    - EUR 50, shared with samuel 10%
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  67
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  70    - EUR 50, shared with samuel (EUR 350)
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  76    - EUR 200
  77  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  79    - donated
  80    - parent #198
  81    - EUR 200
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  83   - MultiCompUnit (and Function Units) proof
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  85   - donated
  86   - parent #195
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  88
  89 ## Completed but not yet submitted:
  90
  91 TO SORT
  92
  93 28feb2022
  94
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
  96    * EUR 1500 (shared with [[tplaten]])
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
  98    * EUR 1500 (shared with [[tplaten]])
  99  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
 100    * EUR 1000 (shared with [[tplaten]])
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
 102    * EUR 500 (shared with [[programmerjake]])
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
 104    * EUR 400 (shared with [[programmerjake]])
 105
 106 before that
 107
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
 109    - EUR 1600
 110    - EUR 800 shared with [[klehman]]
 111    - EUR 800 shared with [[lkcl]]
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
 113    - EUR 800
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 118    - EUR 500
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 123  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 124
 125
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 127    - EUR 150
 128    - donated
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 130    - EUR 200
 131    - donated
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 133    - EUR 150
 134    - donated
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 136    - EUR 200
 137    - donated
 138  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 139    - EUR 700
 140    - (lip6.fr donated)
 141  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 142    - (total EUR 400 25% donated by LIP6)
 143    - EUR 100 lkcl
 144  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 145    - EUR 900
 146    - shared with [[lxo]]
 147  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 148    - EUR 1100
 149    - shared with lauri, jacob
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 151    - EUR 1250
 152    - Shared 50% with Staf
 153  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 154    - EUR 300
 155    - Shared with Staf, cole
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 157    - EUR 450
 158    - Shared with Staf
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 160  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 161    - Project 2019-10-043 06dec2020 wishbone
 162    - EUR (TBD)
 163
 164 ### Project 2019-10-029 14mar2020 coriolis2
 165
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 167    - (total EUR 100 shared 50% with staf)
 168    - EUR 50 lkcl
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 170    - (total EUR 1500 shared 50% with LIP6)
 171    - EUR 750 lkcl
 172  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 173    - (total EUR 400 shared 75% with LIP6)
 174    - EUR 300 lkcl
 175
 176 ### Project 2019-02-012 06dec2020 Core
 177
 178  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 179    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 180  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 181    - EUR 750 donated
 182  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 183    - EUR 1500
 184
 185 ### Project 2019-10-043 06dec2020 wishbone
 186
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 188    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 190    - EUR 200
 191  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 192    - EUR 100
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 194    - EUR 200
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 196    - EUR 100
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 198    - EUR 200
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 200    - EUR 450
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 202    - EUR 100
 203  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 204    - EUR 200 donated
 205  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 206    - EUR 250 (share with cole)
 207
 208 ### Project 2019-10-032 06dec2020 proofs
 209
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 211    - parent #195
 212    - EUR 400 donated
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 214    - parent #195
 215    - EUR 300 donated
 216  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 217    - EUR 400 donated
 218    - parent #195
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 220    - EUR 400 donated
 221    - parent #195
 222
 223 ## Submitted for NLNet RFP
 224
 225 submitted 2021-dec-09 but not confirmed paid
 226
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 228    - EUR 300
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 230    - EUR 250
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 232  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 234    - EUR 800 shared between:
 235    - EUR 500 [[lkcl]]
 236    - EUR 300 [[tplaten]]
 237  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 238    - EUR 5500 shared between:
 239    - EUR 3850 lkcl
 240    - EUR 1650 Others
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 242    - EUR 1600
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 244    - EUR 600
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 246    - EUR 500 shared between:
 247    - EUR 100 [[lkcl]]
 248    - EUR 325 dmitry
 249    - EUR 75 maciej
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 251
 252
 253 ### Project 2019-02-012 04sep2020 Core
 254
 255  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 256    - EUR 2000 total, shared with florent.  EUR 1200
 257
 258 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 259
 260 ## Paid
 261
 262 donation from NLNet confirmed received:
 263
 264 ### coriolis2 2021-apr-04
 265
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 267    - EUR 3000
 268    - shared with Staf 50%
 269
 270 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 271
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 273     - EUR 2000, python POWER9 simulator
 274     - Shared 50% with [[mnolan]], EUR 1000
 275  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 276     - EUR 250, functions needed for simulator
 277     - Shared 20% with [[mnolan]], EUR 50
 278
 279 ### proofs 2019-10-032
 280
 281  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 282    - EUR 500 shared 20% samuel, EUR 100
 283  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 284    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 285  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 286    - EUR 400 shared 25% [[mnolan]] EUR 100
 287  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 288    - EUR 150
 289
 290 ### wishbone 2019-10-043
 291
 292  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 293    - EUR 500
 294  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 295     - EUR 300
 296  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 297     - EUR 250
 298  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 299    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 300  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 301    - EUR 300
 302  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 303    - EUR 400, 50% shared [[programmerjake]] EUR 200
 304  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 305    - EUR 750, 33% shared [[programmerjake]] EUR 250
 306  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 307    - EUR 200 50% shared, cole, EUR 100
 308  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 309    - EUR 200
 310  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 311    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 312  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 313    - EUR 150
 314  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 315    - EUR 400 shared 50% [[mnolan]] EUR 200
 316  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 317    - EUR 250 shared 40% [[mnolan]] EUR 100
 318  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 319    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 320  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 321    - EUR 300 shared 50% [[mnolan]] EUR 150
 322  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 323    - EUR 750
 324  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 325   - EUR 100
 326  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 327   - EUR 100
 328  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 329    - EUR 100
 330  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 331    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 332
 333 ### Project 2019-02-012 28-apr-2020
 334
 335  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 336    - 6600 scoreboard multi-read/write
 337    - EUR 600
 338  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 339    - Partitioned equals and greater than comparison
 340    - Shared 50% with [[mnolan]]
 341    - EUR 200 (each)
 342  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 343    - partitioned scalar/vector shift
 344    - Shared 50% with [[lkcl]]
 345    - EUR 350 (each)
 346
 347 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 348
 349  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 350     - auto-parser of POWER9
 351     - Shared 50% with [[mnolan]]
 352     - EUR 500 (each)
 353
 354 ### Project 2019-10-029 Date 14mar2020
 355
 356 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 357   - EUR 1200
 358
 359 ### Project 2019-02-012 Date 12mar2020
 360
 361 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 362 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 363 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 364 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 365
 366 ### Project 2019-02-012 Date 28jan2020
 367
 368 * admin tasks
 369 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 370