lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  25  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  29    - EUR
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  34  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  35  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  38    - shared with cole
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  40    - EUR 50, shared with samuel 10%
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  45    - EUR 50, shared with samuel (EUR 350)
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  51    - EUR 200
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  54    - donated
  55    - parent #198
  56    - EUR 200
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  58   - MultiCompUnit (and Function Units) proof
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  60   - donated
  61   - parent #195
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  63
  64 ## Completed but not yet submitted:
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  66    - EUR 800
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  71    - EUR 800 shared between:
  72    - EUR 500 [[lkcl]]
  73    - EUR 300 [[tplaten]]
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
  75    - EUR 5000 shared between:
  76    - EUR 3850 lkcl
  77    - EUR 1150 Others
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
  79    - EUR 1600
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
  81    - EUR 600
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  83    - EUR 500
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  89
  90
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  92    - EUR 150
  93    - donated
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  95    - EUR 200
  96    - donated
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  98    - EUR 150
  99    - donated
 100  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 101    - EUR 200
 102    - donated
 103  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 104    - EUR 700
 105    - (lip6.fr donated)
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 107    - (total EUR 400 25% donated by LIP6)
 108    - EUR 100 lkcl
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 110    - EUR 900
 111    - shared with [[lxo]]
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 113    - EUR 1100
 114    - shared with lauri, jacob
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 116    - EUR 1250
 117    - Shared 50% with Staf
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 119    - EUR 300
 120    - Shared with Staf, cole
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 122    - EUR 450
 123    - Shared with Staf
 124  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 126    - EUR 3000
 127    - shared with Staf 50%
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 129    - Project 2019-10-043 06dec2020 wishbone
 130    - EUR (TBD)
 131
 132 ### Project 2019-10-029 14mar2020 coriolis2
 133
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 135    - (total EUR 100 shared 50% with staf)
 136    - EUR 50 lkcl
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 138    - (total EUR 1500 shared 50% with LIP6)
 139    - EUR 750 lkcl
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 141    - (total EUR 400 shared 75% with LIP6)
 142    - EUR 300 lkcl
 143
 144 ### Project 2019-02-012 06dec2020 Core
 145
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 147    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 148  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 149    - EUR 750 donated
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 151    - EUR 1500
 152
 153 ### Project 2019-10-043 06dec2020 wishbone
 154
 155  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 156    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 157  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 158    - EUR 200
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 160    - EUR 100
 161  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 162    - EUR 200
 163  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 164    - EUR 100
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 166    - EUR 200
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 168    - EUR 450
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 170    - EUR 100
 171  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 172    - EUR 200 donated
 173  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 174    - EUR 250 (share with cole)
 175
 176 ### Project 2019-10-032 06dec2020 proofs
 177
 178  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 179    - parent #195
 180    - EUR 400 donated
 181  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 182    - parent #195
 183    - EUR 300 donated
 184  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 185    - EUR 400 donated
 186    - parent #195
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 188    - EUR 400 donated
 189    - parent #195
 190
 191 ## Submitted for NLNet RFP
 192
 193 submitted but not confirmed paid:
 194
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 196
 197 ### Project 2019-02-012 04sep2020 Core
 198
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 200    - EUR 2000 total, shared with florent.  EUR 1200
 201
 202 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 203
 204 ## Paid
 205
 206 donation from NLNet confirmed received:
 207
 208 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 209
 210  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 211     - EUR 2000, python POWER9 simulator
 212     - Shared 50% with [[mnolan]], EUR 1000
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 214     - EUR 250, functions needed for simulator
 215     - Shared 20% with [[mnolan]], EUR 50
 216
 217 ### proofs 2019-10-032
 218
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 220    - EUR 500 shared 20% samuel, EUR 100
 221  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 222    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 223  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 224    - EUR 400 shared 25% [[mnolan]] EUR 100
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 226    - EUR 150
 227
 228 ### wishbone 2019-10-043
 229
 230  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 231    - EUR 500
 232  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 233     - EUR 300
 234  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 235     - EUR 250
 236  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 237    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 238  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 239    - EUR 300
 240  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 241    - EUR 400, 50% shared [[programmerjake]] EUR 200
 242  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 243    - EUR 750, 33% shared [[programmerjake]] EUR 250
 244  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 245    - EUR 200 50% shared, cole, EUR 100
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 247    - EUR 200
 248  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 249    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 250  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 251    - EUR 150
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 253    - EUR 400 shared 50% [[mnolan]] EUR 200
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 255    - EUR 250 shared 40% [[mnolan]] EUR 100
 256  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 257    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 258  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 259    - EUR 300 shared 50% [[mnolan]] EUR 150
 260  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 261    - EUR 750
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 263   - EUR 100
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 265   - EUR 100
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 267    - EUR 100
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 269    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 270
 271 ### Project 2019-02-012 28-apr-2020
 272
 273  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 274    - 6600 scoreboard multi-read/write
 275    - EUR 600
 276  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 277    - Partitioned equals and greater than comparison
 278    - Shared 50% with [[mnolan]]
 279    - EUR 200 (each)
 280  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 281    - partitioned scalar/vector shift
 282    - Shared 50% with [[lkcl]]
 283    - EUR 350 (each)
 284
 285 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 286
 287  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 288     - auto-parser of POWER9
 289     - Shared 50% with [[mnolan]]
 290     - EUR 500 (each)
 291
 292 ### Project 2019-10-029 Date 14mar2020
 293
 294 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 295   - EUR 1200
 296
 297 ### Project 2019-02-012 Date 12mar2020
 298
 299 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 300 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 301 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 302 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 303
 304 ### Project 2019-02-012 Date 28jan2020
 305
 306 * admin tasks
 307 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 308