lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> to be donated
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  23    - EUR 250
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  25    - EUR 1250
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  35  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  39    - EUR
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  44  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  45  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  48    - shared with cole
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  50    - EUR 50, shared with samuel 10%
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  55    - EUR 50, shared with samuel (EUR 350)
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  61    - EUR 200
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  64    - donated
  65    - parent #198
  66    - EUR 200
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  68   - MultiCompUnit (and Function Units) proof
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  70   - donated
  71   - parent #195
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  73
  74 ## Completed but not yet submitted:
  75
  76 TO SORT
  77
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
  79    - EUR 1600
  80    - EUR 800 shared with [[klehman]]
  81    - EUR 800 shared with [[lkcl]]
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
  83    - EUR 800
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
  88    - EUR 500
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  93  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  94
  95
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  97    - EUR 150
  98    - donated
  99  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 100    - EUR 200
 101    - donated
 102  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 103    - EUR 150
 104    - donated
 105  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 106    - EUR 200
 107    - donated
 108  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 109    - EUR 700
 110    - (lip6.fr donated)
 111  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 112    - (total EUR 400 25% donated by LIP6)
 113    - EUR 100 lkcl
 114  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 115    - EUR 900
 116    - shared with [[lxo]]
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 118    - EUR 1100
 119    - shared with lauri, jacob
 120  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 121    - EUR 1250
 122    - Shared 50% with Staf
 123  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 124    - EUR 300
 125    - Shared with Staf, cole
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 127    - EUR 450
 128    - Shared with Staf
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 130  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 131    - Project 2019-10-043 06dec2020 wishbone
 132    - EUR (TBD)
 133
 134 ### Project 2019-10-029 14mar2020 coriolis2
 135
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 137    - (total EUR 100 shared 50% with staf)
 138    - EUR 50 lkcl
 139  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 140    - (total EUR 1500 shared 50% with LIP6)
 141    - EUR 750 lkcl
 142  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 143    - (total EUR 400 shared 75% with LIP6)
 144    - EUR 300 lkcl
 145
 146 ### Project 2019-02-012 06dec2020 Core
 147
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 149    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 150  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 151    - EUR 750 donated
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 153    - EUR 1500
 154
 155 ### Project 2019-10-043 06dec2020 wishbone
 156
 157  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 158    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 160    - EUR 200
 161  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 162    - EUR 100
 163  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 164    - EUR 200
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 166    - EUR 100
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 168    - EUR 200
 169  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 170    - EUR 450
 171  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 172    - EUR 100
 173  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 174    - EUR 200 donated
 175  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 176    - EUR 250 (share with cole)
 177
 178 ### Project 2019-10-032 06dec2020 proofs
 179
 180  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 181    - parent #195
 182    - EUR 400 donated
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 184    - parent #195
 185    - EUR 300 donated
 186  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 187    - EUR 400 donated
 188    - parent #195
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 190    - EUR 400 donated
 191    - parent #195
 192
 193 ## Submitted for NLNet RFP
 194
 195 submitted 2021-dec-09 but not confirmed paid
 196
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 198    - EUR 300
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 200    - EUR 250
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 202  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 204    - EUR 800 shared between:
 205    - EUR 500 [[lkcl]]
 206    - EUR 300 [[tplaten]]
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 208    - EUR 5500 shared between:
 209    - EUR 3850 lkcl
 210    - EUR 1650 Others
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 212    - EUR 1600
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 214    - EUR 600
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 216    - EUR 500 shared between:
 217    - EUR 100 [[lkcl]]
 218    - EUR 325 dmitry
 219    - EUR 75 maciej
 220  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 221
 222
 223 ### Project 2019-02-012 04sep2020 Core
 224
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 226    - EUR 2000 total, shared with florent.  EUR 1200
 227
 228 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 229
 230 ## Paid
 231
 232 donation from NLNet confirmed received:
 233
 234 ### coriolis2 2021-apr-04
 235
 236  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 237    - EUR 3000
 238    - shared with Staf 50%
 239
 240 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 241
 242  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 243     - EUR 2000, python POWER9 simulator
 244     - Shared 50% with [[mnolan]], EUR 1000
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 246     - EUR 250, functions needed for simulator
 247     - Shared 20% with [[mnolan]], EUR 50
 248
 249 ### proofs 2019-10-032
 250
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 252    - EUR 500 shared 20% samuel, EUR 100
 253  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 254    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 255  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 256    - EUR 400 shared 25% [[mnolan]] EUR 100
 257  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 258    - EUR 150
 259
 260 ### wishbone 2019-10-043
 261
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 263    - EUR 500
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 265     - EUR 300
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 267     - EUR 250
 268  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 269    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 270  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 271    - EUR 300
 272  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 273    - EUR 400, 50% shared [[programmerjake]] EUR 200
 274  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 275    - EUR 750, 33% shared [[programmerjake]] EUR 250
 276  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 277    - EUR 200 50% shared, cole, EUR 100
 278  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 279    - EUR 200
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 281    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 282  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 283    - EUR 150
 284  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 285    - EUR 400 shared 50% [[mnolan]] EUR 200
 286  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 287    - EUR 250 shared 40% [[mnolan]] EUR 100
 288  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 289    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 290  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 291    - EUR 300 shared 50% [[mnolan]] EUR 150
 292  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 293    - EUR 750
 294  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 295   - EUR 100
 296  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 297   - EUR 100
 298  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 299    - EUR 100
 300  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 301    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 302
 303 ### Project 2019-02-012 28-apr-2020
 304
 305  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 306    - 6600 scoreboard multi-read/write
 307    - EUR 600
 308  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 309    - Partitioned equals and greater than comparison
 310    - Shared 50% with [[mnolan]]
 311    - EUR 200 (each)
 312  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 313    - partitioned scalar/vector shift
 314    - Shared 50% with [[lkcl]]
 315    - EUR 350 (each)
 316
 317 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 318
 319  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 320     - auto-parser of POWER9
 321     - Shared 50% with [[mnolan]]
 322     - EUR 500 (each)
 323
 324 ### Project 2019-10-029 Date 14mar2020
 325
 326 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 327   - EUR 1200
 328
 329 ### Project 2019-02-012 Date 12mar2020
 330
 331 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 332 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 333 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 334 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 335
 336 ### Project 2019-02-012 Date 28jan2020
 337
 338 * admin tasks
 339 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 340