(no commit message)
[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
8 * <http://twitter.com/lkcl>
9 * <https://libre-soc.org/task_db/>
10
11 # Priority tasks to keep an eye on
12
13 * <https://bugs.libre-soc.org/show_bug.cgi?id=197> 6600 proof
14 EUR 5000
15 * <https://bugs.libre-soc.org/show_bug.cgi?id=254> 12500 3D
16
17 # Status tracking
18
19 move things along from one stage to the next
20
21 ## Currently working on
22
23 - Project Management
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=594> PartitionedSignal RFC
25 - EUR 1500
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=665> nmigen c compiler
27 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISANS letter
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=240> ISA switch
29 - <https://bugs.libre-soc.org/show_bug.cgi?id=238> Compressed writeup
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=858> SVP64 Primer
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=867> svindex
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=834> binutils draft instructions
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=533> cr int draft instructions
34 - <https://bugs.libre-soc.org/show_bug.cgi?id=251> 3D MESA
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
40 - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
41 - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
42 - EUR 150
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
44 - EUR 150
45 - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
46 - EUR 1000
47 - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
48 - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
49 - EUR 250
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
51 - EUR 1000 of 1250 shared
52 - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
53 - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
54 - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
55 - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
56 - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
57 - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
58 - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
59 - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
60 - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
61 - https://bugs.libre-soc.org/show_bug.cgi?id=575
62 - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
63 - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
64 - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
65 - EUR
66 - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
67 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
68 - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
69 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
70 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
71 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
72 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
73 - shared with cole
74 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
75 - EUR 50, shared with samuel 10%
76 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
77
78 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
79 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
80 - EUR 50, shared with samuel (EUR 350)
81 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
82 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
83 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
84 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
85 - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
86 - EUR 200
87 - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
88 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
89 - donated
90 - parent #198
91 - EUR 200
92 - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
93 - MultiCompUnit (and Function Units) proof
94 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
95 - donated
96 - parent #195
97 - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
98
99 ## Completed but not yet submitted:
100
101 TO SORT
102
103 28feb2022
104
105 - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
106 * EUR 1500 (shared with [[tplaten]])
107 - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
108 * EUR 1500 (shared with [[tplaten]])
109 - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
110 * EUR 1000 (shared with [[tplaten]])
111 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
112 * EUR 500 (shared with [[programmerjake]])
113 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
114 * EUR 400 (shared with [[programmerjake]])
115
116 before that
117
118 - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
119 - EUR 1600
120 - EUR 800 shared with [[klehman]]
121 - EUR 800 shared with [[lkcl]]
122 - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
123 - EUR 800
124 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
125 - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
126 - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
127 - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
128 - EUR 500
129 - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
130 - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
131 - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
132 - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
133 - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
134
135
136 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
137 - EUR 150
138 - donated
139 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
140 - EUR 200
141 - donated
142 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
143 - EUR 150
144 - donated
145 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
146 - EUR 200
147 - donated
148 - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
149 - EUR 700
150 - (lip6.fr donated)
151 - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
152 - (total EUR 400 25% donated by LIP6)
153 - EUR 100 lkcl
154 - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
155 - EUR 900
156 - shared with [[lxo]]
157 - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
158 - EUR 1100
159 - shared with lauri, jacob
160 - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
161 - EUR 1250
162 - Shared 50% with Staf
163 - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
164 - EUR 300
165 - Shared with Staf, cole
166 - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
167 - EUR 450
168 - Shared with Staf
169 - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
170 - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
171 - Project 2019-10-043 06dec2020 wishbone
172 - EUR (TBD)
173
174 ### Project 2019-10-029 14mar2020 coriolis2
175
176 - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
177 - (total EUR 100 shared 50% with staf)
178 - EUR 50 lkcl
179 - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
180 - (total EUR 1500 shared 50% with LIP6)
181 - EUR 750 lkcl
182 - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
183 - (total EUR 400 shared 75% with LIP6)
184 - EUR 300 lkcl
185
186 ### Project 2019-02-012 06dec2020 Core
187
188 - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
189 - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
190 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
191 - EUR 750 donated
192 - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
193 - EUR 1500
194
195 ### Project 2019-10-043 06dec2020 wishbone
196
197 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
198 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
199 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
200 - EUR 200
201 - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
202 - EUR 100
203 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
204 - EUR 200
205 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
206 - EUR 100
207 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
208 - EUR 200
209 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
210 - EUR 450
211 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
212 - EUR 100
213 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
214 - EUR 200 donated
215 - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
216 - EUR 250 (share with cole)
217
218 ### Project 2019-10-032 06dec2020 proofs
219
220 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
221 - parent #195
222 - EUR 400 donated
223 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
224 - parent #195
225 - EUR 300 donated
226 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
227 - EUR 400 donated
228 - parent #195
229 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
230 - EUR 400 donated
231 - parent #195
232
233 ## Submitted for NLNet RFP
234
235 submitted 2021-dec-09 but not confirmed paid
236
237 - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
238 - EUR 300
239 - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
240 - EUR 250
241 - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
242 - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
243 - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
244 - EUR 800 shared between:
245 - EUR 500 [[lkcl]]
246 - EUR 300 [[tplaten]]
247 - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
248 - EUR 5500 shared between:
249 - EUR 3850 lkcl
250 - EUR 1650 Others
251 - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
252 - EUR 1600
253 - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
254 - EUR 600
255 - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
256 - EUR 500 shared between:
257 - EUR 100 [[lkcl]]
258 - EUR 325 dmitry
259 - EUR 75 maciej
260 - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
261
262
263 ### Project 2019-02-012 04sep2020 Core
264
265 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
266 - EUR 2000 total, shared with florent. EUR 1200
267
268 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
269
270 ## Paid
271
272 donation from NLNet confirmed received:
273
274 ### coriolis2 2021-apr-04
275
276 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
277 - EUR 3000
278 - shared with Staf 50%
279
280 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
281
282 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
283 - EUR 2000, python POWER9 simulator
284 - Shared 50% with [[mnolan]], EUR 1000
285 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
286 - EUR 250, functions needed for simulator
287 - Shared 20% with [[mnolan]], EUR 50
288
289 ### proofs 2019-10-032
290
291 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
292 - EUR 500 shared 20% samuel, EUR 100
293 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
294 - EUR 300 shared 1/6 [[mnolan]] EUR 50
295 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
296 - EUR 400 shared 25% [[mnolan]] EUR 100
297 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
298 - EUR 150
299
300 ### wishbone 2019-10-043
301
302 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
303 - EUR 500
304 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
305 - EUR 300
306 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
307 - EUR 250
308 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
309 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
310 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
311 - EUR 300
312 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
313 - EUR 400, 50% shared [[programmerjake]] EUR 200
314 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
315 - EUR 750, 33% shared [[programmerjake]] EUR 250
316 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
317 - EUR 200 50% shared, cole, EUR 100
318 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
319 - EUR 200
320 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
321 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
322 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
323 - EUR 150
324 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
325 - EUR 400 shared 50% [[mnolan]] EUR 200
326 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
327 - EUR 250 shared 40% [[mnolan]] EUR 100
328 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
329 - EUR 300 shared 1/3 [[mnolan]] EUR 100
330 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
331 - EUR 300 shared 50% [[mnolan]] EUR 150
332 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
333 - EUR 750
334 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
335 - EUR 100
336 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
337 - EUR 100
338 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
339 - EUR 100
340 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
341 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
342
343 ### Project 2019-02-012 28-apr-2020
344
345 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
346 - 6600 scoreboard multi-read/write
347 - EUR 600
348 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
349 - Partitioned equals and greater than comparison
350 - Shared 50% with [[mnolan]]
351 - EUR 200 (each)
352 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
353 - partitioned scalar/vector shift
354 - Shared 50% with [[lkcl]]
355 - EUR 350 (each)
356
357 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
358
359 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
360 - auto-parser of POWER9
361 - Shared 50% with [[mnolan]]
362 - EUR 500 (each)
363
364 ### Project 2019-10-029 Date 14mar2020
365
366 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
367 - EUR 1200
368
369 ### Project 2019-02-012 Date 12mar2020
370
371 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
372 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
373 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
374 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
375
376 ### Project 2019-02-012 Date 28jan2020
377
378 * admin tasks
379 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
380