lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8
   9 # Status tracking
  10
  11 move things along from one stage to the next
  12
  13 ## Currently working on
  14
  15  - Project Management
  16  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  22  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  26    - EUR
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  35  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  36  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  39    - shared with cole
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  41    - EUR 50, shared with samuel 10%
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  46    - EUR 50, shared with samuel (EUR 350)
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  53    - EUR 200
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  55  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  60    - donated
  61    - parent #198
  62    - EUR 200
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  64   - MultiCompUnit (and Function Units) proof
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  66   - donated
  67   - parent #195
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  69
  70 ## Completed but not yet submitted:
  71
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
  73    - EUR 150
  74    - donated
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
  76    - EUR 200
  77    - donated
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  79    - EUR 150
  80    - donated
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
  82    - EUR 200
  83    - donated
  84  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
  85    - EUR 700
  86    - (lip6.fr donated)
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
  88    - (total EUR 400 25% donated by LIP6)
  89    - EUR 100 lkcl
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
  91    - EUR 900
  92    - shared with [[lxo]]
  93  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
  94    - EUR 1100
  95    - shared with lauri, jacob
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
  97    - EUR 1250
  98    - Shared 50% with Staf
  99  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 100    - EUR 300
 101    - Shared with Staf, cole
 102  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 103    - EUR 450
 104    - Shared with Staf
 105  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 107    - EUR 3000
 108    - shared with Staf 50%
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 110    - Project 2019-10-043 06dec2020 wishbone
 111    - EUR (TBD)
 112
 113 ### Project 2019-10-029 14mar2020 coriolis2
 114
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 116    - (total EUR 100 shared 50% with staf)
 117    - EUR 50 lkcl
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 119    - (total EUR 1500 shared 50% with LIP6)
 120    - EUR 750 lkcl
 121  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 122    - (total EUR 400 shared 75% with LIP6)
 123    - EUR 300 lkcl
 124
 125 ### Project 2019-02-012 06dec2020 Core
 126
 127  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 128    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 129  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 130    - EUR 750 donated
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 132    - EUR 1500
 133
 134 ### Project 2019-10-043 06dec2020 wishbone
 135
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 137    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 139    - EUR 200
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 141    - EUR 100
 142  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 143    - EUR 200
 144  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 145    - EUR 100
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 147    - EUR 200
 148  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 149    - EUR 450
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 151    - EUR 100
 152  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 153    - EUR 200 donated
 154  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 155    - EUR 250 (share with cole)
 156
 157 ### Project 2019-10-032 06dec2020 proofs
 158
 159  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 160    - parent #195
 161    - EUR 400 donated
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 163    - parent #195
 164    - EUR 300 donated
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 166    - EUR 400 donated
 167    - parent #195
 168  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 169    - EUR 400 donated
 170    - parent #195
 171
 172 ## Submitted for NLNet RFP
 173
 174 submitted but not confirmed paid:
 175
 176 ### Project 2019-02-012 04sep2020 Core
 177
 178  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 179    - EUR 2000 total, shared with florent.  EUR 1200
 180
 181 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 182
 183 ## Paid
 184
 185 donation from NLNet confirmed received:
 186
 187 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 188
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 190     - EUR 2000, python POWER9 simulator
 191     - Shared 50% with [[mnolan]], EUR 1000
 192  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 193     - EUR 250, functions needed for simulator
 194     - Shared 20% with [[mnolan]], EUR 50
 195
 196 ### proofs 2019-10-032
 197
 198  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 199    - EUR 500 shared 20% samuel, EUR 100
 200  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 201    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 202  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 203    - EUR 400 shared 25% [[mnolan]] EUR 100
 204  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 205    - EUR 150
 206
 207 ### wishbone 2019-10-043
 208
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 210    - EUR 500
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 212     - EUR 300
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 214     - EUR 250
 215  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 216    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 217  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 218    - EUR 300
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 220    - EUR 400, 50% shared [[programmerjake]] EUR 200
 221  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 222    - EUR 750, 33% shared [[programmerjake]] EUR 250
 223  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 224    - EUR 200 50% shared, cole, EUR 100
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 226    - EUR 200
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 228    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 230    - EUR 150
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 232    - EUR 400 shared 50% [[mnolan]] EUR 200
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 234    - EUR 250 shared 40% [[mnolan]] EUR 100
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 236    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 237  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 238    - EUR 300 shared 50% [[mnolan]] EUR 150
 239  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 240    - EUR 750
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 242   - EUR 100
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 244   - EUR 100
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 246    - EUR 100
 247  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 248    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 249
 250 ### Project 2019-02-012 28-apr-2020
 251
 252  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 253    - 6600 scoreboard multi-read/write
 254    - EUR 600
 255  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 256    - Partitioned equals and greater than comparison
 257    - Shared 50% with [[mnolan]]
 258    - EUR 200 (each)
 259  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 260    - partitioned scalar/vector shift
 261    - Shared 50% with [[lkcl]]
 262    - EUR 350 (each)
 263
 264 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 265
 266  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 267     - auto-parser of POWER9
 268     - Shared 50% with [[mnolan]]
 269     - EUR 500 (each)
 270
 271 ### Project 2019-10-029 Date 14mar2020
 272
 273 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 274   - EUR 1200
 275
 276 ### Project 2019-02-012 Date 12mar2020
 277
 278 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 279 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 280 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 281 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 282
 283 ### Project 2019-02-012 Date 28jan2020
 284
 285 * admin tasks
 286 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 287