lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9 * <https://libre-soc.org/task_db/>
  10
  11 # Priority tasks to keep an eye on
  12
  13 * <https://bugs.libre-soc.org/show_bug.cgi?id=864> parallel prefix EUR 3000
  14 * <https://bugs.libre-soc.org/show_bug.cgi?id=899> transcendentals sim EUR 4000
  15 * <https://bugs.libre-soc.org/show_bug.cgi?id=898> binutils objdump EUR 2500
  16 * <https://bugs.libre-soc.org/show_bug.cgi?id=871> Pack/Unpack
  17   EUR 700
  18 * <https://bugs.libre-soc.org/show_bug.cgi?id=197> 6600 proof
  19   EUR 5000
  20
  21 # Status tracking
  22
  23 move things along from one stage to the next
  24
  25 ## Currently working on
  26
  27  - Project Management
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=594> PartitionedSignal RFC
  29    - EUR 1500
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=665> nmigen c compiler
  31  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISANS letter
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=240> ISA switch
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=238> Compressed writeup
  34  - <https://bugs.libre-soc.org/show_bug.cgi?id=858> SVP64 Primer
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=867> svindex
  36  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> binutils draft instructions
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=533> cr int draft instructions
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=251> 3D MESA
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
  46    - EUR 150
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
  48    - EUR 150
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
  50    - EUR 1000
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  53    - EUR 250
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  55    - EUR 1000 of 1250 shared
  56  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  59  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  61  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  63  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  65  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  69    - EUR
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  72  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  73  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  74  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  76  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  77    - shared with cole
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  79    - EUR 50, shared with samuel 10%
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  81
  82  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  84    - EUR 50, shared with samuel (EUR 350)
  85  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  86  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  88  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  89  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  90    - EUR 200
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  92  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  93    - donated
  94    - parent #198
  95    - EUR 200
  96  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  97   - MultiCompUnit (and Function Units) proof
  98  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  99   - donated
 100   - parent #195
 101  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
 102
 103 ## Completed but not yet submitted:
 104
 105 TO SORT
 106
 107 28feb2022
 108
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
 110    * EUR 1500 (shared with [[tplaten]])
 111  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
 112    * EUR 1500 (shared with [[tplaten]])
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
 114    * EUR 1000 (shared with [[tplaten]])
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
 116    * EUR 500 (shared with [[programmerjake]])
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
 118    * EUR 400 (shared with [[programmerjake]])
 119
 120 before that
 121
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
 123    - EUR 1600
 124    - EUR 800 shared with [[klehman]]
 125    - EUR 800 shared with [[lkcl]]
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
 127    - EUR 800
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
 129  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
 130  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 132    - EUR 500
 133  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 135  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 138
 139
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 141    - EUR 150
 142    - donated
 143  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 144    - EUR 200
 145    - donated
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 147    - EUR 150
 148    - donated
 149  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 150    - EUR 200
 151    - donated
 152  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 153    - EUR 700
 154    - (lip6.fr donated)
 155  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 156    - (total EUR 400 25% donated by LIP6)
 157    - EUR 100 lkcl
 158  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 159    - EUR 900
 160    - shared with [[lxo]]
 161  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 162    - EUR 1100
 163    - shared with lauri, jacob
 164  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 165    - EUR 1250
 166    - Shared 50% with Staf
 167  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 168    - EUR 300
 169    - Shared with Staf, cole
 170  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 171    - EUR 450
 172    - Shared with Staf
 173  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 174  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 175    - Project 2019-10-043 06dec2020 wishbone
 176    - EUR (TBD)
 177
 178 ### Project 2019-10-029 14mar2020 coriolis2
 179
 180  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 181    - (total EUR 100 shared 50% with staf)
 182    - EUR 50 lkcl
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 184    - (total EUR 1500 shared 50% with LIP6)
 185    - EUR 750 lkcl
 186  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 187    - (total EUR 400 shared 75% with LIP6)
 188    - EUR 300 lkcl
 189
 190 ### Project 2019-02-012 06dec2020 Core
 191
 192  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 193    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 194  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 195    - EUR 750 donated
 196  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 197    - EUR 1500
 198
 199 ### Project 2019-10-043 06dec2020 wishbone
 200
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 202    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 203  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 204    - EUR 200
 205  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 206    - EUR 100
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 208    - EUR 200
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 210    - EUR 100
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 212    - EUR 200
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 214    - EUR 450
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 216    - EUR 100
 217  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 218    - EUR 200 donated
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 220    - EUR 250 (share with cole)
 221
 222 ### Project 2019-10-032 06dec2020 proofs
 223
 224  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 225    - parent #195
 226    - EUR 400 donated
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 228    - parent #195
 229    - EUR 300 donated
 230  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 231    - EUR 400 donated
 232    - parent #195
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 234    - EUR 400 donated
 235    - parent #195
 236
 237 ## Submitted for NLNet RFP
 238
 239 submitted 2021-dec-09 but not confirmed paid
 240
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 242    - EUR 300
 243  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 244    - EUR 250
 245  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 247  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 248    - EUR 800 shared between:
 249    - EUR 500 [[lkcl]]
 250    - EUR 300 [[tplaten]]
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 252    - EUR 5500 shared between:
 253    - EUR 3850 lkcl
 254    - EUR 1650 Others
 255  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 256    - EUR 1600
 257  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 258    - EUR 600
 259  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 260    - EUR 500 shared between:
 261    - EUR 100 [[lkcl]]
 262    - EUR 325 dmitry
 263    - EUR 75 maciej
 264  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 265
 266
 267 ### Project 2019-02-012 04sep2020 Core
 268
 269  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 270    - EUR 2000 total, shared with florent.  EUR 1200
 271
 272 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 273
 274 ## Paid
 275
 276 donation from NLNet confirmed received:
 277
 278 ### coriolis2 2021-apr-04
 279
 280  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 281    - EUR 3000
 282    - shared with Staf 50%
 283
 284 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 285
 286  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 287     - EUR 2000, python POWER9 simulator
 288     - Shared 50% with [[mnolan]], EUR 1000
 289  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 290     - EUR 250, functions needed for simulator
 291     - Shared 20% with [[mnolan]], EUR 50
 292
 293 ### proofs 2019-10-032
 294
 295  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 296    - EUR 500 shared 20% samuel, EUR 100
 297  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 298    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 299  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 300    - EUR 400 shared 25% [[mnolan]] EUR 100
 301  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 302    - EUR 150
 303
 304 ### wishbone 2019-10-043
 305
 306  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 307    - EUR 500
 308  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 309     - EUR 300
 310  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 311     - EUR 250
 312  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 313    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 314  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 315    - EUR 300
 316  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 317    - EUR 400, 50% shared [[programmerjake]] EUR 200
 318  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 319    - EUR 750, 33% shared [[programmerjake]] EUR 250
 320  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 321    - EUR 200 50% shared, cole, EUR 100
 322  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 323    - EUR 200
 324  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 325    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 326  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 327    - EUR 150
 328  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 329    - EUR 400 shared 50% [[mnolan]] EUR 200
 330  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 331    - EUR 250 shared 40% [[mnolan]] EUR 100
 332  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 333    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 334  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 335    - EUR 300 shared 50% [[mnolan]] EUR 150
 336  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 337    - EUR 750
 338  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 339   - EUR 100
 340  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 341   - EUR 100
 342  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 343    - EUR 100
 344  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 345    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 346
 347 ### Project 2019-02-012 28-apr-2020
 348
 349  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 350    - 6600 scoreboard multi-read/write
 351    - EUR 600
 352  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 353    - Partitioned equals and greater than comparison
 354    - Shared 50% with [[mnolan]]
 355    - EUR 200 (each)
 356  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 357    - partitioned scalar/vector shift
 358    - Shared 50% with [[lkcl]]
 359    - EUR 350 (each)
 360
 361 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 362
 363  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 364     - auto-parser of POWER9
 365     - Shared 50% with [[mnolan]]
 366     - EUR 500 (each)
 367
 368 ### Project 2019-10-029 Date 14mar2020
 369
 370 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 371   - EUR 1200
 372
 373 ### Project 2019-02-012 Date 12mar2020
 374
 375 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 376 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 377 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 378 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 379
 380 ### Project 2019-02-012 Date 28jan2020
 381
 382 * admin tasks
 383 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 384