lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7
   8 # Status tracking
   9
  10 move things along from one stage to the next
  11
  12 ## Currently working on
  13
  14  - Project Management
  15  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  16  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  17  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  21    - EUR
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
  27  - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
  29  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  30  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  31  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  34    - shared with cole
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  36    - EUR 50, shared with samuel 10%
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  41    - EUR 50, shared with samuel (EUR 350)
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  46  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  48    - EUR 200
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
  50  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  55    - donated
  56    - parent #198
  57    - EUR 200
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  59   - MultiCompUnit (and Function Units) proof
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  61   - donated
  62   - parent #195
  63
  64 ## Completed but not yet submitted:
  65
  66  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
  67    - EUR 150
  68    - donated
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
  70    - EUR 200
  71    - donated
  72  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
  73    - EUR 700
  74    - (lip6.fr donated)
  75  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
  76    - (total EUR 400 25% donated by LIP6)
  77    - EUR 100 lkcl
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
  79    - EUR 900
  80    - shared with [[lxo]]
  81  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
  82    - EUR 1100
  83    - shared with lauri, jacob
  84  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
  85    - EUR 1250
  86    - Shared 50% with Staf
  87  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
  88    - EUR 300
  89    - Shared with Staf, cole
  90  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
  91    - EUR 450
  92    - Shared with Staf
  93  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
  94  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
  95    - EUR 3000
  96    - shared with Staf 50%
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
  98    - Project 2019-10-043 06dec2020 wishbone
  99    - EUR (TBD)
 100
 101 ### Project 2019-10-029 14mar2020 coriolis2
 102
 103  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 104    - (total EUR 100 shared 50% with staf)
 105    - EUR 50 lkcl
 106  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 107    - (total EUR 1500 shared 50% with LIP6)
 108    - EUR 750 lkcl
 109  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 110    - (total EUR 400 shared 75% with LIP6)
 111    - EUR 300 lkcl
 112
 113 ### Project 2019-02-012 06dec2020 Core
 114
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 116    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 117  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 118    - EUR 750 donated
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 120    - EUR 1500
 121
 122 ### Project 2019-10-043 06dec2020 wishbone
 123
 124  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 125    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 126  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 127    - EUR 200
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 129    - EUR 100
 130  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 131    - EUR 200
 132  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 133    - EUR 100
 134  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 135    - EUR 200
 136  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 137    - EUR 450
 138  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 139    - EUR 100
 140  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 141    - EUR 200 donated
 142  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 143    - EUR 250 (share with cole)
 144
 145 ### Project 2019-10-032 06dec2020 proofs
 146
 147  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 148    - parent #195
 149    - EUR 400 donated
 150  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 151    - parent #195
 152    - EUR 300 donated
 153  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 154    - EUR 400 donated
 155    - parent #195
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 157    - EUR 400 donated
 158    - parent #195
 159
 160 ## Submitted for NLNet RFP
 161
 162 submitted but not confirmed paid:
 163
 164 ### Project 2019-02-012 04sep2020 Core
 165
 166  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 167    - EUR 2000 total, shared with florent.  EUR 1200
 168
 169 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 170
 171 ## Paid
 172
 173 donation from NLNet confirmed received:
 174
 175 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 176
 177  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 178     - EUR 2000, python POWER9 simulator
 179     - Shared 50% with [[mnolan]], EUR 1000
 180  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 181     - EUR 250, functions needed for simulator
 182     - Shared 20% with [[mnolan]], EUR 50
 183
 184 ### proofs 2019-10-032
 185
 186  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 187    - EUR 500 shared 20% samuel, EUR 100
 188  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 189    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 190  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 191    - EUR 400 shared 25% [[mnolan]] EUR 100
 192  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 193    - EUR 150
 194
 195 ### wishbone 2019-10-043
 196
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 198    - EUR 500
 199  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 200     - EUR 300
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 202     - EUR 250
 203  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 204    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 205  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 206    - EUR 300
 207  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 208    - EUR 400, 50% shared [[programmerjake]] EUR 200
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 210    - EUR 750, 33% shared [[programmerjake]] EUR 250
 211  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 212    - EUR 200 50% shared, cole, EUR 100
 213  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 214    - EUR 200
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 216    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 217  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 218    - EUR 150
 219  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 220    - EUR 400 shared 50% [[mnolan]] EUR 200
 221  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 222    - EUR 250 shared 40% [[mnolan]] EUR 100
 223  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 224    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 226    - EUR 300 shared 50% [[mnolan]] EUR 150
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 228    - EUR 750
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 230   - EUR 100
 231  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 232   - EUR 100
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 234    - EUR 100
 235  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 236    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 237
 238 ### Project 2019-02-012 28-apr-2020
 239
 240  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 241    - 6600 scoreboard multi-read/write
 242    - EUR 600
 243  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 244    - Partitioned equals and greater than comparison
 245    - Shared 50% with [[mnolan]]
 246    - EUR 200 (each)
 247  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 248    - partitioned scalar/vector shift
 249    - Shared 50% with [[lkcl]]
 250    - EUR 350 (each)
 251
 252 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 253
 254  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 255     - auto-parser of POWER9
 256     - Shared 50% with [[mnolan]]
 257     - EUR 500 (each)
 258
 259 ### Project 2019-10-029 Date 14mar2020
 260
 261 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 262   - EUR 1200
 263
 264 ### Project 2019-02-012 Date 12mar2020
 265
 266 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 267 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 268 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 269 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 270
 271 ### Project 2019-02-012 Date 28jan2020
 272
 273 * admin tasks
 274 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 275