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[libreriscv.git] / lkcl.mdwn
1 # Luke Kenneth Casson Leighton
2
3 Lead dev and Project Coordinator for Libre-SOC.
4
5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
7
8 # Status tracking
9
10 move things along from one stage to the next
11
12 ## Currently working on
13
14 - Project Management
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix (check if already RFPd)
16 - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
17 - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=425>
19 - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=432>
21 - <https://bugs.libre-soc.org/show_bug.cgi?id=450>
22 - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
23 - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
24 - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
25 - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
27 - shared with cole
28 - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
29 - EUR 50, shared with samuel 10%
30 - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
31 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
32 - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
33 - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
34 - EUR 50, shared with samuel (EUR 350)
35 - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
36 - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
37 - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
38 - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
39 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> Branch proof
40 - EUR 400 shared 25% [[mnolan]] EUR 100
41 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> ALU proof
42 - EUR 500 shared [[mnolan]] samuel, TBD split
43 - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
44 - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
45 - EUR 200
46 - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
47 - EUR 250 (share with cole)
48 - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
49 - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
50 - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
51 - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
52 - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
53 - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
54
55 ## Completed but not yet submitted:
56
57 - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
58 - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
59 - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
60 - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
61 - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
62 - EUR 200
63 - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
64 - EUR 100
65 - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
66 - EUR 200
67 - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
68 - EUR 100
69 - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
70 - EUR 200
71 - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
72 - EUR 450
73 - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
74 - EUR 100
75 - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
76
77 donated:
78
79 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
80 - with [[lkcl]]
81 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
82 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
83 - functions needed for simulator
84 - Shared 90% with [[lkcl]]
85 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
86 - Formal proof of decoder
87 - EUR 200
88 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
89 - POWER9 ALU proof
90 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
91 - POWER9 CR proof
92 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
93 - POWER9 BRANCH proof
94 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
95 - POWER9 LOGICAL proof
96 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
97 - POWER9 ROTATE proof
98 - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
99 - MultiCompUnit (and Function Units) proof
100
101 ## Submitted for NLNet RFP
102
103 submitted but not confirmed paid:
104
105 ### Project 2019-02-012 04sep2020 Core
106
107 - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
108 - EUR 2000 total, shared with florent. EUR 1200
109
110 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
111
112 ## Paid
113
114 donation from NLNet confirmed received:
115
116 ### 2019-10P-046 19-aug-2020 NLNet 2019-10-046 Formal Standards OpenPOWER
117
118 - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
119 - EUR 2000, python POWER9 simulator
120 - Shared 50% with [[mnolan]], EUR 1000
121 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
122 - EUR 250, functions needed for simulator
123 - Shared 20% with [[mnolan]], EUR 50
124
125 #### proofs 2019-10-032
126
127 - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
128 - EUR 500 shared 20% samuel, EUR 100
129 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
130 - EUR 300 shared 1/6 [[mnolan]] EUR 50
131 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
132 - EUR 400 shared 25% [[mnolan]] EUR 100
133 - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
134 - EUR 150
135
136 ### wishbone 2019-10-043
137
138 - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
139 - EUR 500
140 - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
141 - EUR 300
142 - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
143 - EUR 250
144 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
145 - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
146 - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
147 - EUR 300
148 - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
149 - EUR 400, 50% shared [[programmerjake]] EUR 200
150 - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
151 - EUR 750, 33% shared [[programmerjake]] EUR 250
152 - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
153 - EUR 200 50% shared, cole, EUR 100
154 - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
155 - EUR 200
156 - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
157 - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
158 - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
159 - EUR 150
160 - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
161 - EUR 400 shared 50% [[mnolan]] EUR 200
162 - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
163 - EUR 250 shared 40% [[mnolan]] EUR 100
164 - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
165 - EUR 300 shared 1/3 [[mnolan]] EUR 100
166 - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
167 - EUR 300 shared 50% [[mnolan]] EUR 150
168 - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
169 - EUR 750
170 - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
171 - EUR 100
172 - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
173 - EUR 100
174 - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
175 - EUR 100
176 - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
177 - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
178
179 ### Project 2019-02-012 28-apr-2020
180
181 - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
182 - 6600 scoreboard multi-read/write
183 - EUR 600
184 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
185 - Partitioned equals and greater than comparison
186 - Shared 50% with [[mnolan]]
187 - EUR 200 (each)
188 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
189 - partitioned scalar/vector shift
190 - Shared 50% with [[lkcl]]
191 - EUR 350 (each)
192
193 ### 2019-10P-046 28-apr-2020 NLNet 2019 Formal Standards OpenPOWER
194
195 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
196 - auto-parser of POWER9
197 - Shared 50% with [[mnolan]]
198 - EUR 500 (each)
199
200 ### Project 2019-10-029 Date 14mar2020
201
202 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial EUR 1200
203
204 ### Project 2019-02-012 Date 12mar2020
205
206 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
207 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
208 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
209 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
210
211 ### Project 2019-02-012 Date 28jan2020
212
213 * admin tasks
214 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
215