lkcl.mdwn

   1 # Luke Kenneth Casson Leighton
   2
   3 Lead dev and Project Coordinator for Libre-SOC.
   4
   5 * [Bugtracker assignments](https://bugs.libre-soc.org/buglist.cgi?email1=lkcl&emailassigned_to1=1&emailtype1=substring&resolution=---)
   6 * [180nm task list](https://bugs.libre-soc.org/showdependencytree.cgi?maxdepth=1&id=383&hide_resolved=1)
   7 * <https://readthedocs.org/profiles/lkcl/> readthedocs link
   8 * <http://twitter.com/lkcl>
   9
  10 # Status tracking
  11
  12 move things along from one stage to the next
  13
  14 ## Currently working on
  15
  16  - Project Management
  17  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> binutils draft instructions
  18  - <https://bugs.libre-soc.org/show_bug.cgi?id=533> cr int draft instructions
  19  - <https://bugs.libre-soc.org/show_bug.cgi?id=251> 3D MESA
  20  - <https://bugs.libre-soc.org/show_bug.cgi?id=844> binutils magic
  21  - <https://bugs.libre-soc.org/show_bug.cgi?id=839> SVP64 whitepaper
  22  - <https://bugs.libre-soc.org/show_bug.cgi?id=243> Documentation SVP64 Proposals
  23  - <https://bugs.libre-soc.org/show_bug.cgi?id=834> management, binutils
  24  - <https://bugs.libre-soc.org/show_bug.cgi?id=463> donated, Simulator
  25  - <https://bugs.libre-soc.org/show_bug.cgi?id=237> SV Encoding
  26  - <https://bugs.libre-soc.org/show_bug.cgi?id=790> nextpnr-xilinx
  27    - EUR 150
  28  - <https://bugs.libre-soc.org/show_bug.cgi?id=802> ls2 documentation
  29    - EUR 150
  30  - <https://bugs.libre-soc.org/show_bug.cgi?id=664> SVP64 Branches
  31    - EUR 1000
  32  - <https://bugs.libre-soc.org/show_bug.cgi?id=176> Partitioned Logic
  33  - <https://bugs.libre-soc.org/show_bug.cgi?id=167> Partitioned Mux
  34    - EUR 250
  35  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> Partitioned Type 2 DSL
  36    - EUR 1250
  37  - <https://bugs.libre-soc.org/show_bug.cgi?id=549> Partitioned Logic docs
  38  - <https://bugs.libre-soc.org/show_bug.cgi?id=684> XLEN-16 fails
  39  - <https://bugs.libre-soc.org/show_bug.cgi?id=701> DCT FFT documentation
  40  - <https://bugs.libre-soc.org/show_bug.cgi?id=658> SVSTATE extended to 64 bit
  41  - <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
  42  - <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
  43  - <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
  44  - <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
  45  - <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
  46  - https://bugs.libre-soc.org/show_bug.cgi?id=575
  47  - <https://bugs.libre-soc.org/show_bug.cgi?id=53> 3D Custom instructions
  48  - <https://bugs.libre-soc.org/show_bug.cgi?id=565> Partitioning Proof
  49  - <https://bugs.libre-soc.org/show_bug.cgi?id=546> Data merging FSM
  50    - EUR
  51  - <https://bugs.libre-soc.org/show_bug.cgi?id=213> SV Spec
  52  - <https://bugs.libre-soc.org/show_bug.cgi?id=214> ISAMux writeup
  53  - <https://bugs.libre-soc.org/show_bug.cgi?id=450> Create HDL MMU
  54  - <https://bugs.libre-soc.org/show_bug.cgi?id=458> PartitionedSignal Module
  55  - <http://bugs.libre-riscv.org/show_bug.cgi?id=81> 6600 scoreboard
  56  - <http://bugs.libre-riscv.org/show_bug.cgi?id=206> branch prediction research
  57  - <https://bugs.libre-soc.org/show_bug.cgi?id=216> LDST buffer
  58  - <https://bugs.libre-soc.org/show_bug.cgi?id=448> MUL tests
  59    - shared with cole
  60  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL proof
  61    - EUR 50, shared with samuel 10%
  62  - <https://bugs.libre-soc.org/show_bug.cgi?id=420> DIV proof
  63
  64  - <https://bugs.libre-soc.org/show_bug.cgi?id=336> Compunit RA=0 test
  65  - <https://bugs.libre-soc.org/show_bug.cgi?id=418> SPR proof
  66    - EUR 50, shared with samuel (EUR 350)
  67  - <https://bugs.libre-soc.org/show_bug.cgi?id=350> LDST RA=0 test
  68  - <https://bugs.libre-soc.org/show_bug.cgi?id=361> RA=0 tests
  69  - <https://bugs.libre-soc.org/show_bug.cgi?id=415> misc opcodes
  70  - <https://bugs.libre-soc.org/show_bug.cgi?id=310> FU multiple tasks
  71  - <https://bugs.libre-soc.org/show_bug.cgi?id=427> LD/ST cache-inhibit
  72    - EUR 200
  73  - <https://bugs.libre-soc.org/show_bug.cgi?id=64> data handling API
  74  - <https://bugs.libre-soc.org/show_bug.cgi?id=211> Formal proof of decoder
  75    - donated
  76    - parent #198
  77    - EUR 200
  78  - <https://bugs.libre-soc.org/show_bug.cgi?id=342> parent #197
  79   - MultiCompUnit (and Function Units) proof
  80  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> POWER9 ROTATE proof
  81   - donated
  82   - parent #195
  83  - <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
  84
  85 ## Completed but not yet submitted:
  86
  87 TO SORT
  88
  89 28feb2022
  90
  91  - <https://bugs.libre-soc.org/show_bug.cgi?id=485> icache
  92    * EUR 1500 (shared with [[tplaten]])
  93  - <https://bugs.libre-soc.org/show_bug.cgi?id=469> dcache
  94    * EUR 1500 (shared with [[tplaten]])
  95  - <https://bugs.libre-soc.org/show_bug.cgi?id=491> mmu
  96    * EUR 1000 (shared with [[tplaten]])
  97  - <https://bugs.libre-soc.org/show_bug.cgi?id=419> MUL Formal (donated)
  98    * EUR 500 (shared with [[programmerjake]])
  99  - <https://bugs.libre-soc.org/show_bug.cgi?id=340> SHIFTROT proof
 100    * EUR 400 (shared with [[programmerjake]])
 101
 102 before that
 103
 104  - <https://bugs.libre-soc.org/show_bug.cgi?id=686> create Power ISA test API
 105    - EUR 1600
 106    - EUR 800 shared with [[klehman]]
 107    - EUR 800 shared with [[lkcl]]
 108  - <https://bugs.libre-soc.org/show_bug.cgi?id=703> SVP64 preliminary decode
 109    - EUR 800
 110  - <https://bugs.libre-soc.org/show_bug.cgi?id=482> mul bug
 111  - <https://bugs.libre-soc.org/show_bug.cgi?id=425> div errors
 112  - <https://bugs.libre-soc.org/show_bug.cgi?id=432> mul overflow incorrect
 113  - <https://bugs.libre-soc.org/show_bug.cgi?id=578> SVP64 generator
 114    - EUR 500
 115  - <https://bugs.libre-soc.org/show_bug.cgi?id=466> 3D MESA planning
 116  - <https://bugs.libre-soc.org/show_bug.cgi?id=490> litex peripheral set
 117  - <https://bugs.libre-soc.org/show_bug.cgi?id=514> ls180 reset review
 118  - <https://bugs.libre-soc.org/show_bug.cgi?id=515> JTAG boot upload/init
 119  - <https://bugs.libre-soc.org/show_bug.cgi?id=511> JTAG IO Boundary test
 120
 121
 122  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 123    - EUR 150
 124    - donated
 125  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 126    - EUR 200
 127    - donated
 128  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 129    - EUR 150
 130    - donated
 131  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 132    - EUR 200
 133    - donated
 134  - <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 tutorial
 135    - EUR 700
 136    - (lip6.fr donated)
 137  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 138    - (total EUR 400 25% donated by LIP6)
 139    - EUR 100 lkcl
 140  - <https://bugs.libre-soc.org/show_bug.cgi?id=556> SV Overview
 141    - EUR 900
 142    - shared with [[lxo]]
 143  - <https://bugs.libre-soc.org/show_bug.cgi?id=557> AV Opcode documentation
 144    - EUR 1100
 145    - shared with lauri, jacob
 146  - <https://bugs.libre-soc.org/show_bug.cgi?id=620> Cocotb simulation
 147    - EUR 1250
 148    - Shared 50% with Staf
 149  - <https://bugs.libre-soc.org/show_bug.cgi?id=502> 4k SRAM
 150    - EUR 300
 151    - Shared with Staf, cole
 152  - <https://bugs.libre-soc.org/show_bug.cgi?id=506> IORing
 153    - EUR 450
 154    - Shared with Staf
 155  - <https://bugs.libre-soc.org/show_bug.cgi?id=606> PowerDecoder2 simplification
 156  - <https://bugs.libre-soc.org/show_bug.cgi?id=519> ULX3S boot
 157    - Project 2019-10-043 06dec2020 wishbone
 158    - EUR (TBD)
 159
 160 ### Project 2019-10-029 14mar2020 coriolis2
 161
 162  - <https://bugs.libre-soc.org/show_bug.cgi?id=508> pin-package for 180nm ASIC
 163    - (total EUR 100 shared 50% with staf)
 164    - EUR 50 lkcl
 165  - <https://bugs.libre-soc.org/show_bug.cgi?id=507> ls180 ioring and pads
 166    - (total EUR 1500 shared 50% with LIP6)
 167    - EUR 750 lkcl
 168  - <https://bugs.libre-soc.org/show_bug.cgi?id=521> multi-clock example
 169    - (total EUR 400 shared 75% with LIP6)
 170    - EUR 300 lkcl
 171
 172 ### Project 2019-02-012 06dec2020 Core
 173
 174  - <https://bugs.libre-soc.org/show_bug.cgi?id=538> pipeline API continued
 175    - EUR 700 lkcl, EUR 500 [[programmerjake]], total EUR 1200
 176  - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
 177    - EUR 750 donated
 178  - <https://bugs.libre-soc.org/show_bug.cgi?id=94> LDST Dep Matrix
 179    - EUR 1500
 180
 181 ### Project 2019-10-043 06dec2020 wishbone
 182
 183  - <https://bugs.libre-soc.org/show_bug.cgi?id=348> SPR pipe
 184    - EUR 250 lkcl, EUR 50 [[programmerjake]], total EUR 300
 185  - <https://bugs.libre-soc.org/show_bug.cgi?id=416> DEC/TB
 186    - EUR 200
 187  - <https://bugs.libre-soc.org/show_bug.cgi?id=426> LD/ST sign-extend
 188    - EUR 100
 189  - <https://bugs.libre-soc.org/show_bug.cgi?id=468> wishbone downconverter
 190    - EUR 200
 191  - <https://bugs.libre-soc.org/show_bug.cgi?id=349> privileged detection
 192    - EUR 100
 193  - <https://bugs.libre-soc.org/show_bug.cgi?id=478> mfcr FXM
 194    - EUR 200
 195  - <https://bugs.libre-soc.org/show_bug.cgi?id=407> XICS
 196    - EUR 450
 197  - <https://bugs.libre-soc.org/show_bug.cgi?id=476> addme bug
 198    - EUR 100
 199  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
 200    - EUR 200 donated
 201  - <https://bugs.libre-soc.org/show_bug.cgi?id=493> DMI to JTAG
 202    - EUR 250 (share with cole)
 203
 204 ### Project 2019-10-032 06dec2020 proofs
 205
 206  - <https://bugs.libre-soc.org/show_bug.cgi?id=306> POWER9 ALU proof
 207    - parent #195
 208    - EUR 400 donated
 209  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> POWER9 CR proof
 210    - parent #195
 211    - EUR 300 donated
 212  - <https://bugs.libre-soc.org/show_bug.cgi?id=335> POWER9 BRANCH proof
 213    - EUR 400 donated
 214    - parent #195
 215  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> POWER9 LOGICAL proof
 216    - EUR 400 donated
 217    - parent #195
 218
 219 ## Submitted for NLNet RFP
 220
 221 submitted 2021-dec-09 but not confirmed paid
 222
 223  - <https://bugs.libre-soc.org/show_bug.cgi?id=709> better Partitioned eq (Assign)
 224    - EUR 300
 225  - <https://bugs.libre-soc.org/show_bug.cgi?id=707> Partitioned Cat
 226    - EUR 250
 227  - <https://bugs.libre-soc.org/show_bug.cgi?id=200> IEEE754 FP layout
 228  - <https://bugs.libre-soc.org/show_bug.cgi?id=654> symbiflow shared with [[veera]]
 229  - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
 230    - EUR 800 shared between:
 231    - EUR 500 [[lkcl]]
 232    - EUR 300 [[tplaten]]
 233  - <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
 234    - EUR 5500 shared between:
 235    - EUR 3850 lkcl
 236    - EUR 1650 Others
 237  - <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
 238    - EUR 1600
 239  - <https://bugs.libre-soc.org/show_bug.cgi?id=702> Matrix REMAP tests
 240    - EUR 600
 241  - <https://bugs.libre-soc.org/show_bug.cgi?id=712> ISACaller supporting XLEN
 242    - EUR 500 shared between:
 243    - EUR 100 [[lkcl]]
 244    - EUR 325 dmitry
 245    - EUR 75 maciej
 246  - <https://bugs.libre-soc.org/show_bug.cgi?id=730> adapt ALU test cases
 247
 248
 249 ### Project 2019-02-012 04sep2020 Core
 250
 251  - <https://bugs.libre-soc.org/show_bug.cgi?id=412> litex
 252    - EUR 2000 total, shared with florent.  EUR 1200
 253
 254 ### Project 2019-02-012 Date {TEMPLATE INSERT DATE}
 255
 256 ## Paid
 257
 258 donation from NLNet confirmed received:
 259
 260 ### coriolis2 2021-apr-04
 261
 262  - <https://bugs.libre-soc.org/show_bug.cgi?id=202> HDL changes for coriolis2
 263    - EUR 3000
 264    - shared with Staf 50%
 265
 266 ### 2019-10P-046 19-aug-2020  NLNet 2019-10-046 Formal Standards OpenPOWER
 267
 268  - <https://bugs.libre-soc.org/show_bug.cgi?id=463>
 269     - EUR 2000, python POWER9 simulator
 270     - Shared 50% with [[mnolan]], EUR 1000
 271  - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
 272     - EUR 250, functions needed for simulator
 273     - Shared 20% with [[mnolan]], EUR 50
 274
 275 ### proofs 2019-10-032
 276
 277  - <https://bugs.libre-soc.org/show_bug.cgi?id=421> Trap proof
 278    - EUR 500 shared 20% samuel, EUR 100
 279  - <https://bugs.libre-soc.org/show_bug.cgi?id=332> CR proof
 280    - EUR 300 shared 1/6 [[mnolan]] EUR 50
 281  - <https://bugs.libre-soc.org/show_bug.cgi?id=331> Logic proof
 282    - EUR 400 shared 25% [[mnolan]] EUR 100
 283  - <https://bugs.libre-soc.org/show_bug.cgi?id=312> countzero proof
 284    - EUR 150
 285
 286 ### wishbone 2019-10-043
 287
 288  - <https://bugs.libre-soc.org/show_bug.cgi?id=460> Document 6600
 289    - EUR 500
 290  - <https://bugs.libre-soc.org/show_bug.cgi?id=393> WB to LDST
 291     - EUR 300
 292  - <https://bugs.libre-soc.org/show_bug.cgi?id=414> DMI interface
 293     - EUR 250
 294  - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> opcode decoder
 295    - EUR 500, shared 40%, with [[mnolan]] (40%), [[programmerjake]] (20%), EUR 200
 296  - <https://bugs.libre-soc.org/show_bug.cgi?id=339> SHIFTROT pipe
 297    - EUR 300
 298  - <https://bugs.libre-soc.org/show_bug.cgi?id=441> test improvement
 299    - EUR 400, 50% shared [[programmerjake]] EUR 200
 300  - <https://bugs.libre-soc.org/show_bug.cgi?id=323> MUL pipe
 301    - EUR 750, 33% shared [[programmerjake]] EUR 250
 302  - <https://bugs.libre-soc.org/show_bug.cgi?id=351> virtual regfile port
 303    - EUR 200 50% shared, cole, EUR 100
 304  - <https://bugs.libre-soc.org/show_bug.cgi?id=345> POWER9 regfiles
 305    - EUR 200
 306  - <https://bugs.libre-soc.org/show_bug.cgi?id=325> Trap pipe
 307    - EUR 500 60% shared, cole (20%) samuel (20%), EUR 300
 308  - <https://bugs.libre-soc.org/show_bug.cgi?id=382> SRAM wishbone object
 309    - EUR 150
 310  - <https://bugs.libre-soc.org/show_bug.cgi?id=305> ALU pipe
 311    - EUR 400 shared 50% [[mnolan]] EUR 200
 312  - <https://bugs.libre-soc.org/show_bug.cgi?id=313> Branch pipe
 313    - EUR 250 shared 40% [[mnolan]] EUR 100
 314  - <https://bugs.libre-soc.org/show_bug.cgi?id=314> CR pipe
 315    - EUR 300 shared 1/3 [[mnolan]] EUR 100
 316  - <https://bugs.libre-soc.org/show_bug.cgi?id=330> Logic pipe
 317    - EUR 300 shared 50% [[mnolan]] EUR 150
 318  - <https://bugs.libre-soc.org/show_bug.cgi?id=346> regfile-core
 319    - EUR 750
 320  - <https://bugs.libre-soc.org/show_bug.cgi?id=344> add mtmsrd
 321   - EUR 100
 322  - <https://bugs.libre-soc.org/show_bug.cgi?id=409> illegal instructions
 323   - EUR 100
 324  - <https://bugs.libre-soc.org/show_bug.cgi?id=435> MSR and PC "state"
 325    - EUR 100
 326  - <https://bugs.libre-soc.org/show_bug.cgi?id=324> DIV pipe
 327    - EUR 1500 shared with [[programmerjake]] 1/3 (EUR 500)
 328
 329 ### Project 2019-02-012 28-apr-2020
 330
 331  - <https://bugs.libre-soc.org/show_bug.cgi?id=292>
 332    - 6600 scoreboard multi-read/write
 333    - EUR 600
 334  - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
 335    - Partitioned equals and greater than comparison
 336    - Shared 50% with [[mnolan]]
 337    - EUR 200 (each)
 338  - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
 339    - partitioned scalar/vector shift
 340    - Shared 50% with [[lkcl]]
 341    - EUR 350 (each)
 342
 343 ### 2019-10P-046 28-apr-2020  NLNet 2019 Formal Standards OpenPOWER
 344
 345  - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
 346     - auto-parser of POWER9
 347     - Shared 50% with [[mnolan]]
 348     - EUR 500 (each)
 349
 350 ### Project 2019-10-029 Date 14mar2020
 351
 352 * <http://bugs.libre-riscv.org/show_bug.cgi?id=178> coriolis2 start/tutorial
 353   - EUR 1200
 354
 355 ### Project 2019-02-012 Date 12mar2020
 356
 357 * <http://bugs.libre-riscv.org/show_bug.cgi?id=113> fcvt range 100% EUR 250
 358 * <http://bugs.libre-riscv.org/show_bug.cgi?id=171> 50% with [[mnolan]] EUR 200
 359 * <http://bugs.libre-riscv.org/show_bug.cgi?id=173> dynamic shift 50% with [[mnolan]] EUR 350
 360 * <http://bugs.libre-riscv.org/show_bug.cgi?id=127> EUR 900 shared with [[programmerjake]]
 361
 362 ### Project 2019-02-012 Date 28jan2020
 363
 364 * admin tasks
 365 * <http://bugs.libre-riscv.org/show_bug.cgi?id=147>
 366