Tasks 1 and 2 are in progress.
[libreriscv.git] / mnolan.mdwn
1 # Michael Nolan
2
3 Bored college student and contributor to Libre-SOC
4
5 # Status Tracking
6
7 ## Currently working on
8
9 - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
10 - with [[lkcl]]
11 - <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
12 - <https://bugs.libre-soc.org/show_bug.cgi?id=272>
13 - functions needed for simulator
14 - Shared 90% with [[lkcl]]
15 - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
16 - Formal proof of decoder
17 - EUR 200
18 - <https://bugs.libre-soc.org/show_bug.cgi?id=306> parent #195
19 - POWER9 ALU proof
20 - <https://bugs.libre-soc.org/show_bug.cgi?id=332> parent #195
21 - POWER9 CR proof
22 - <https://bugs.libre-soc.org/show_bug.cgi?id=335> parent #195
23 - POWER9 BRANCH proof
24 - <https://bugs.libre-soc.org/show_bug.cgi?id=331> parent #195
25 - POWER9 LOGICAL proof
26 - <https://bugs.libre-soc.org/show_bug.cgi?id=340> parent #195
27 - POWER9 ROTATE proof
28
29 ## Completed not yet submitted
30
31 ## Submitted for RFP, waiting for payment
32
33
34 ## Paid
35
36 ### 2019-02-012 28-apr-2020 - Paid 08may2020
37
38 - <http://bugs.libre-riscv.org/show_bug.cgi?id=189> parent #48
39 - Add partitioned right shift to partitioned shifter
40 - EUR 150
41 - <http://bugs.libre-riscv.org/show_bug.cgi?id=171> parent #48
42 - Partitioned equals and greater than comparison
43 - Shared 50% with [[lkcl]]
44 - EUR 200 (each)
45 - <http://bugs.libre-riscv.org/show_bug.cgi?id=172> parent #48
46 - Partitioned adc/sub/neg
47 - EUR 150
48 - <http://bugs.libre-riscv.org/show_bug.cgi?id=173> parent #48
49 - partitioned scalar/vector shift
50 - Shared 50% with [[lkcl]]
51 - EUR 350 (each)
52
53 ### 2019-10P-046 28-apr-2020 - Paid 08may2020
54
55 - <https://bugs.libre-soc.org/show_bug.cgi?id=269> parent #241
56 - auto-parser of POWER9
57 - Shared 50% with [[lkcl]]
58 - EUR 500 (each)
59
60 ### 2019-10P-032 28-apr-2020 - Paid 08may2020
61
62 - <https://bugs.libre-soc.org/show_bug.cgi?id=162> parent #196
63 - Verify FSGNJ
64 - EUR 150
65 - <https://bugs.libre-soc.org/show_bug.cgi?id=163> parent #196
66 - Verify FPMAX/MIN
67 - EUR 150
68 - <https://bugs.libre-soc.org/show_bug.cgi?id=165> parent #196
69 - Verify FP comparison operators
70 - EUR 150
71
72
73 ### Project 2019-02-012 Date 27jan2020
74
75 - <http://bugs.libre-riscv.org/show_bug.cgi?id=120>
76
77 ### Project 2019-02-012 Date 09feb2020 - paid 28feb2020
78
79 - <http://bugs.libre-riscv.org/show_bug.cgi?id=129>
80 - Floating point eq, gt, ge
81 - EUR 150
82 - <http://bugs.libre-riscv.org/show_bug.cgi?id=130>
83 - Floating point min/max
84 - EUR 200