wip
[soc.git] / nix / ilang.nix
1 { version, litexPkgs }:
2
3 { stdenv, python3Packages, yosys, libresoc-verilog }:
4
5 stdenv.mkDerivation {
6 pname = "libresoc.il";
7 inherit version;
8
9 src = ../src/soc/litex/florent;
10
11 strictDeps = true;
12
13 nativeBuildInputs = (with python3Packages; [
14 python migen c4m-jtag nmigen-soc python libresoc-ieee754fpu libresoc-openpower-isa
15 ]) ++ (with litexPkgs; [ litex litedram liteeth liteiclink litescope litesdcard ]);
16
17 postPatch = ''
18 patchShebangs --build .
19
20 export PYTHONPATH="${../src}:$PYTHONPATH"
21 '';
22
23 configurePhase = "true";
24
25 buildPhase = ''
26 runHook preBuild
27 cp ${libresoc-verilog} libresoc/libresoc.v
28 ./ls180soc.py --build --platform=ls180sram4k --num-srams=2 --srams4k
29 runHook postBuild
30 '';
31
32 installPhase = ''
33 runHook preInstall
34 mkdir $out
35 mv build/ls180sram4k/gateware/ls180sram4k.v $out/ls180.v
36 mv build/ls180sram4k/gateware/mem.init $out
37 mv build/ls180sram4k/gateware/mem_1.init $out
38 mv libresoc/libresoc.v $out
39 mv libresoc/SPBlock_512W64B8W.v $out
40 runHook postInstall
41 '';
42
43 fixupPhase = "true";
44 }