WIP
[soc.git] / nix / ilang.nix
1 { version }:
2
3 { stdenv, python3Packages, yosys, libresoc-verilog }:
4
5 stdenv.mkDerivation {
6 pname = "libresoc.il";
7 inherit version;
8
9 src = ../src/soc/litex/florent;
10
11 strictDeps = true;
12
13 nativeBuildInputs = (with python3Packages; [
14 c4m-jtag nmigen-soc python libresoc-ieee754fpu libresoc-openpower-isa
15 ]) ++ [ yosys ];
16
17 postPatch = ''
18 patchShebangs --build .
19 '';
20
21 configurePhase = "true";
22
23 buildPhase = ''
24 runHook preBuild
25 cp ${libresoc-verilog} libresoc/libresoc.v
26 stat ls180soc.py
27 ./ls180soc.py --build --platform=ls180sram4k --num-srams=2 --srams4k
28 echo IKJIJIJIJI
29 #make ls1804k
30 runHook postBuild
31 '';
32
33 installPhase = ''
34 runHook preInstall
35 mkdir $out
36 mv ls180.il ls180_cvt.il libresoc_cvt.il -t $out
37 runHook postInstall
38 '';
39
40 fixupPhase = "true";
41 }