3 { stdenv, python3Packages, yosys, libresoc-verilog }:
9 src = ../src/soc/litex/florent;
13 nativeBuildInputs = (with python3Packages; [
14 c4m-jtag nmigen-soc python libresoc-ieee754fpu libresoc-openpower-isa
18 patchShebangs --build .
21 configurePhase = "true";
25 cp ${libresoc-verilog} libresoc/libresoc.v
27 ./ls180soc.py --build --platform=ls180sram4k --num-srams=2 --srams4k
36 mv ls180.il ls180_cvt.il libresoc_cvt.il -t $out