3 { stdenv, python3Packages, python2, yosys }:
13 nativeBuildInputs = (with python3Packages; [
14 c4m-jtag nmigen-soc python libresoc-ieee754fpu libresoc-openpower-isa
17 configurePhase = "true";
21 env -C pinmux ${python2}/bin/python src/pinmux_generator.py -v -s ls180 -o ls180
22 cp pinmux/ls180/ls180_pins.py src/soc/debug
23 cp pinmux/ls180/ls180_pins.py src/soc/litex/florent/libresoc
25 export PYTHONPATH="$PWD:$PYTHONPATH"
26 python3 soc/simple/issuer_verilog.py \
27 --debug=jtag --enable-core --enable-pll \
28 --enable-xics --enable-sram4x4kblock --disable-svp64 \