nix/verilog.nix

   1 { version }:
   2
   3 { stdenv, python3Packages }:
   4
   5 stdenv.mkDerivation {
   6   pname = "libresoc.v";
   7   inherit version;
   8
   9   src = ../.;
  10
  11   strictDeps = true;
  12
  13   nativeBuildInputs = with python3Packages; [ python libresoc-ieee754fpu libresoc-openpower-isa ];
  14
  15   configurePhase = "true";
  16
  17   buildPhase = ''
  18     runHook preBuild
  19     python3 src/soc/simple/issuer_verilog.py \
  20       --debug=jtag --enable-core --enable-pll \
  21       --enable-xics --enable-sram4x4kblock --disable-svp64 \
  22       libresoc.v
  23     runHook postBuild
  24   '';
  25
  26   installPhase = ''
  27     runHook preInstall
  28     mv libresoc.v $out
  29     runHook postInstall
  30   '';
  31
  32   fixupPhase = "true";
  33 }