nlnet_2019_amdvlk_port.mdwn

   1 # NL.net proposal
   2
   3 ## Project name
   4
   5 Port of AMDVLK/RADV 3D Driver to the Libre RISC-V SoC
   6
   7 ## Website / wiki
   8
   9 <https://libre-riscv.org/nlnet_2019_amdvlk_port>
  10
  11 Please be short and to the point in your answers; focus primarily on
  12 the what and how, not so much on the why. Add longer descriptions as
  13 attachments (see below). If English isn't your first language, don't
  14 worry - our reviewers don't care about spelling errors, only about
  15 great ideas. We apologise for the inconvenience of having to submit in
  16 English. On the up side, you can be as technical as you need to be (but
  17 you don't have to). Do stay concrete. Use plain text in your reply only,
  18 if you need any HTML to make your point please include this as attachment.
  19
  20 ## Abstract: Can you explain the whole project and its expected outcome(s).
  21
  22 The Libre RISCV SoC is being developed to provide a privacy-respecting
  23 modern processor, developed transparently and as libre to the bedrock
  24 as possible.  As a hybrid processor, it is intended to be both a CPU
  25 *and* a GPU.  GPUs are normally proprietary (and thus are perfect candidate
  26 attack vectors), as is the 3D driver software.
  27
  28 In January 2019, AMD released a fully-functioning libre-licensed Vulkan
  29 Driver for their Radeon GPUs.  A close examination of its source code
  30 shows that it would be relatively straightforward to replace the libraries
  31 that generate Radeon GPU assembly code with ones that generate assembly
  32 for the Libre RISC-V SoC, instead.
  33
  34 In addition, further investigation shows that RADV, the libre-licensed
  35 MESA 3D Driver, also supports SPIR-V (by way of conversion to MESA NIR),
  36 and, likewise, may be a good candidate for replacing Radeon with Libre
  37 RISC-V assembly.
  38
  39 Thus we intend to do exactly that: leverage the excellent work already
  40 done to create a libre-licensed commercial-grade Vulkan 3D driver that
  41 takes full advantage
  42 of the parallelism and Vectorisation in the hybrid Libre RISC-V SoC.
  43
  44 # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?
  45
  46 Luke Leighton is an ethical technology specialist who has a consistent
  47 24-year track record of developing code in a real-time transparent
  48 (fully libre) fashion, and in managing Software Libre teams.  He is the
  49 lead developer on the Libre RISC-V SoC.
  50
  51 Jacob Lifshay is a software libre 3D expert who developed a Vulkan 3D
  52 software render engine under the GSoc2017 Programme.  He also developed
  53 his own libre-licensed 32-bit RISC-V processor, and has written an
  54 optimising javascript compiler.  Jacob is a valuable member of the team and is
  55 working on Kazan (https://salsa.debian.org/Kazan-team/kazan)
  56
  57 # Requested Amount
  58
  59 EUR 50,000.
  60
  61 # Explain what the requested budget will be used for?
  62
  63 After a thorough and comprehensive evaluation to see which will be the
  64 best to choose (RADV or AMDVLK), we are aiming for a multi-stage process,
  65 starting with the basics:
  66
  67 * The first stage is to remove AMD's "PAL" Library in AMDVLK, or the
  68   AMDGPU engine used in RADV, and replace it with a straightforward
  69   upstream port of the current LLVM JIT compiler, alongside a "support"
  70   library that will call OpenCL / OpenGL functions directly on the main
  71   processor.  This "effectively" turns the engine into a peer of google
  72   swiftshader (a "Software 3D Renderer") which will allow us to carry out
  73   rapid testing on stable x86 systems before moving on to the next stage.
  74 * The second stage is to confirm that the standard RISC-V LLVM JIT
  75   (which was recently upstreamed as of LLVM 9.0.0) is properly functional
  76   under an emulator or other RV64GC system.
  77 * The third phase will be to begin the iterative process, tying in closely
  78   with the work on Kazan, to experiment in both a software simulator
  79   as well as in FPGAs, with the addition of both Vectorisation as well
  80   as custom opcodes that will significantly improve performance as well
  81   as meet commercially-acceptable power-performance demands.
  82
  83 At the point where commercial power-performance requirements are met we may
  84 officially declare the project a "success".
  85
  86 # Does the project have other funding sources, both past and present?
  87
  88 The overall project has sponsorship from Purism as well as a prior grant
  89 from NLNet.  However that is for specifically covering the development
  90 of the RTL (the hardware source code), and for a "parallel" 3D Vulkan
  91 Driver effort, Kazan.
  92
  93 Kazan is to be written in Rust and its inclusion in the initial 2018
  94 proposal was *before* AMDVLK was released (Jan 2019).  AMDVLK is written
  95 in c++, is a significant way along (further than Kazan), however there
  96 is a different design focus in each that makes choosing one over the
  97 other not only difficult but potentially a costly mistake.
  98
  99 # Compare your own project with existing or historical efforts.
 100
 101 Nyuzi is a Software-based 3D Engine that has an LLVM port.  The problem
 102 is that it has deliberately been designed to be a software-only
 103 Vector Processor.  As such, with no custom accelerated opcodes
 104 dedicated to 3D, its power-performance metric is a whopping 25% that of
 105 commercially-acceptable 3D GPUs.  It also has no actual 3D Vulkan Driver:
 106 the developers focussed only on the "core algorithms" as part of an
 107 (extremely useful) academic exercise, only.
 108
 109 Google's swiftshader is a software-based 3D Driver/Engine that is compatible
 110 with at least one version of Vulkan.  On the face of it, this would be a
 111 perfect match for the Libre RISC-V SoC due to it being a hybrid CPU / GPU.
 112 The problem is that swiftshader was designed - from the ground up - never
 113 to have Vectorisation or any form of accelerated hardware beyond SIMD
 114 (NEON, Altivec, SSE/AVX).  As Nyuzi clearly shows, this approach is
 115 known to give a massive 400% power penalty.  Not only that, but our
 116 additions would not be welcome due to the primary focus of swiftshader
 117 being on non-hardware-accelerated, non-custom processors.
 118
 119 RADV is the free software competitor to AMDVLK.  It takes a different
 120 route: converting SPIR-V to NIR (New Internal Representation) which will
 121 need close evaluation to ensure that it's directly suited to Vector
 122 Processing.  Like AMDVLK, it does not directly support RISC-V: it was
 123 purely intended to support Radeon GPUs.
 124
 125 Our initial proposal - Kazan - is much more interesting to discern and
 126 compare against.  Kazan is being specifically designed so that the
 127 SPIR-V compiler is capable of fully supporting "full-function vectorisation".
 128 LLVM IR does *NOT* normally support this (which is why SPIR-V was created
 129 by the Khronos Group in the first place).  However, AMDVLK, which is a
 130 hard fork of LLVM, has had its LLVM-IR specifically modified to support
 131 both full-function vectorisation, predication, and in addition, texturisation,
 132 such that this information may be "carried" down to the Radeon assembly level,
 133 through the PAL library.
 134
 135 Standard LLVM does *not* support this full-function vectorisation
 136 capability: it is typically left up to any given assembly-level
 137 converter (such as the RISC-V Vector Engine) to "opportunistically"
 138 turn non-vectorised programs *into* vectorised ones, whereas AMDVLK
 139 *explicitly* carries this very same information.
 140
 141 Kazan on the other hand intends to perform explicit Vectorisation
 142 code-transformations in a different location: inside the SPIR-V compiler
 143 itself.  This key radical technical difference is why we seek to explore
 144 the alternative approach taken by AMD side-by-side with that of Kazan,
 145 because it is just not possible to predict in advance which would be "better".
 146
 147 ## What are significant technical challenges you expect to solve during the project, if any?
 148
 149 This is compiler technology, which is traditionally viewed as particularly
 150 challenging.  We are slightly fortunate in that much of the pieces of
 151 the puzzle already exist: AMDVLK, RADV, the upstreamed acceptance of
 152 RISC-V LLVM 9.0.0 being the key ones.
 153
 154 Whilst we know *technically* what they did and why they did it, the key
 155 challenge will be to unravel what exact changes AMD made which caused
 156 them to have to "fork" LLVM several years back, to keep track of their
 157 efforts to introduce "mainline" LLVM patches on an ongoing piecemeal
 158 basis, and at the same time *add our own assembler back-end* into the
 159 same fast-moving target.
 160
 161 ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?
 162
 163 As mentioned in the 2018 submission, the Libre RISC-V
 164 SoC has a full set of resources for Libre Project Management and development:
 165 mailing list, bugtracker, git repository and wiki - all listed here:
 166 <https://libre-riscv.org/>
 167
 168 In addition, we have a Crowdsupply page
 169 <https://www.crowdsupply.com/libre-risc-v/m-class> which provides a public
 170 gateway, and heise.de, reddit, phoronix, slashdot and other locations have
 171 all picked up the story.  The list is updated and maintained here:
 172 <https://libre-riscv.org/3d_gpu/>
 173
 174 # Extra info to be submitted
 175
 176 * <http://libre-riscv.org/3d_gpu/>
 177 * <https://nlnet.nl/project/Libre-RISCV/>
 178 * <https://github.com/GPUOpen-Drivers/AMDVLK>
 179 * <https://github.com/google/swiftshader/>
 180 * <https://salsa.debian.org/Kazan-team/kazan>
 181 * <https://github.com/mesa3d/mesa/tree/master/src/amd/vulkan>
 182