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[libreriscv.git] / nlnet_2021_3mdeb_cavatools.mdwn
1 ## Project name
2
3 Libre-SOC 3mdeb Cavatools: Power ISA Simulator
4
5 ## Website / wiki
6
7 <https://libre-soc.org/nlnet_2021_3mdeb_cavatools>
8
9 Please be short and to the point in your answers; focus primarily on
10 the what and how, not so much on the why. Add longer descriptions as
11 attachments (see below). If English isn't your first language, don't
12 worry - our reviewers don't care about spelling errors, only about
13 great ideas. We apologise for the inconvenience of having to submit in
14 English. On the up side, you can be as technical as you need to be (but
15 you don't have to). Do stay concrete. Use plain text in your reply only,
16 if you need any HTML to make your point please include this as attachment.
17
18 ## Abstract: Can you explain the whole project and its expected outcome(s).
19
20 Cavatools is currently a high performance user-operated simulator of
21 the RISC-V ISA. The primary objective of the project is to extend it to
22 implement the scalar Power ISA and the Libre-SOC Draft SVP64
23 Extensions. This will allow rapid prototyping of Extensions to the
24 Power ISA long before they reach silicon (which is very costly).
25 In turn this helps Libre-SOC to deliver on its commitment to provide
26 user-trustable processors for use in Internet routers, desktop,
27 smartphone and other user-operated devices where security and transparency
28 is expected.
29
30 # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?
31
32 3mdeb is currently helping Libre-SOC with the (horribly slow,
33 easy-to-read) Libre-SOC Power ISA Simulator which is 20,000 times
34 slower than cavatools. 3mdeb is also helping with ISA level unit tests in
35 Libre-SOC's code base that will be used to cross-validate a huge range of
36 Power ISA simulators and actual silicon implementations.
37
38 # Requested Amount
39
40 EUR $50,000.
41
42 # Explain what the requested budget will be used for?
43
44 * To create a compiler which takes Libre-SOC Machine-readable
45 Power ISA specification files and generate c code
46 * To extend cavatools to include support for the Scalar
47 parts of the Power ISA
48 * To then add support for Libre-SOC's Draft SVP64 Extensions
49 * To enhance it to include gdb "remote" machine interface
50 support
51 * To add Power ISA RADIX MMU emulation
52 * To extend cavatools to run a very basic linux
53 initramfs in-memory with basic serial console access
54 * To demonstrate running first a single core linux kernel
55 and later a SMP one, with busybox
56 * To use the exact same Spec c compiler to create
57 an "illegal instruction trap" emulator, integrated
58 into the linux kernel for emulating SIMD instructions.
59
60 # Does the project have other funding sources, both past and present?
61
62 Although there is NLnet funding for the Libre-SOC Simulator
63 (written in python) and associayed unit tests, cavatools, which is
64 written in c by Peter Hsu, does not have funding for the Power ISA
65 aditions.
66
67 # Compare your own project with existing or historical efforts.
68
69 ## What are significant technical challenges you expect to solve during the project, if any?
70
71
72 ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?
73
74 # Extra info to be submitted