(no commit message)
[libreriscv.git] / nlnet_2022_librebmc.mdwn
1 # NL.net proposal
2
3
4 ## Project name
5
6 LibreBMC
7
8 ## Website / wiki
9
10 <https://libre-soc.org/nlnet_2022_librebmc>
11
12 Please be short and to the point in your answers; focus primarily on
13 the what and how, not so much on the why. Add longer descriptions as
14 attachments (see below). If English isn't your first language, don't
15 worry - our reviewers don't care about spelling errors, only about
16 great ideas. We apologise for the inconvenience of having to submit in
17 English. On the up side, you can be as technical as you need to be (but
18 you don't have to). Do stay concrete. Use plain text in your reply only,
19 if you need any HTML to make your point please include this as attachment.
20
21 ## Abstract: Can you explain the whole project and its expected outcome(s).
22
23 LibreBMC replaces the proprietary Boot Management Controller and its
24 secret firmware, entirely. In servers typically used in Data Centres
25 and for scenarios where data privacy is paramount
26 this turns out to be critical. One of the most commonly-used BMC
27 Processors in the world has a silicon-baked plaintext password for its
28 Serial Console, and with a BMC being the very means by which
29 a processor's BIOS is uploaded it allows full bypass of every conceivable
30 security measure.
31
32 BMC Processors are also present in every AMD and Intel desktop and Laptop
33 in the world. Even replacing the BIOS with coreboot is not enough to
34 gain trust because the BMC is in charge of uploading coreboot.
35 At least in this case if the BMC's firmware is replaced it increases
36 trust that the payload (coreboot) has not been tampered with. However
37 this is so low-level that there is serious risk of damaging the machine.
38
39 LibreBMC therefore intends to make a low-cost dual FPGA-based "Experimentation"
40 platform, as Libre/Open Hardware, for developers to iteratively
41 test out development of alternative BMC Firmware (LibreBMC, OpenBMC),
42 without risk of damage to the machine it is managing. One FPGA will
43 run LibreBMC, the other Libre-SOC/Microwatt/A2O, and the first will boot
44 the second.
45
46 This will allow the next phase - actual booting of servers and desktop
47 machines - to proceed with confidence.
48
49 # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?
50
51
52 # Requested Amount
53
54 EUR 75,000.
55
56 # Explain what the requested budget will be used for?
57
58
59 # Compare your own project with existing or historical efforts.
60
61
62 ## What are significant technical challenges you expect to solve during the project, if any?
63
64
65
66 ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?
67
68
69 # Extra info to be submitted
70
71 * TODO URLs etc