nlnet_2022_opf_isa_wg.mdwn

   1 # NL.net proposal
   2
   3 * 2022-08-051, approved 24 Oct 2022
   4 * [[nlnet_2022_opf_isa_wg/discussion]]
   5 * <https://bugs.libre-soc.org/show_bug.cgi?id=952>
   6
   7 ## Project name
   8
   9 Libre-SOC OpenPOWER ISA RFCs
  10
  11 ## Website / wiki
  12
  13 <https://libre-soc.org/nlnet_2022_opf_isa_wg>
  14
  15 # Summary
  16
  17 In earlier NLnet Grants, thanks to EU funding, we developed Draft
  18 SVP64 (a Vector Extension for the Power ISA), around a hundred
  19 new Draft instructions that dramatically improves the Supercomputing-class
  20 Power ISA, a Simulator, thousands
  21 of unit tests and over 350 pages of documentation.  What we could
  22 not do however was submit a Specification to the OpenPOWER ISA
  23 Working Group because the ISA WG was in the process of being
  24 ratified.  That has now been done, and we need to begin the
  25 formal process of writing up "Requests For Change" and submitting
  26 them. The end result will be an extremely powerful Vector ISA suitable
  27 for use in Digitally-Sovereign end-user products.
  28
  29 # Submission to NLnet
  30
  31 Please be short and to the point in your answers; focus primarily on
  32 the what and how, not so much on the why. Add longer descriptions as
  33 attachments (see below). If English isn't your first language, don't
  34 worry - our reviewers don't care about spelling errors, only about
  35 great ideas. We apologise for the inconvenience of having to submit in
  36 English. On the up side, you can be as technical as you need to be (but
  37 you don't have to). Do stay concrete. Use plain text in your reply only,
  38 if you need any HTML to make your point please include this as attachment.
  39
  40 ## Abstract: Can you explain the whole project and its expected outcome(s).
  41
  42 The current NLnet funding to date has allowed Libre-SOC to develop
  43 one of the most powerful Scalable Vector ISAs in the world.
  44 The 25-year-old Power ISA, developed and curated by IBM, was
  45 transferred to the OpenPOWER Foundation, and is the basis on
  46 which, with NLnet EU funding, we have based
  47 Simple-V, the Draft Scalable Vector Extension.
  48
  49 Simple-V *needs* to be submitted to the OPF ISA Working Group,
  50 for formal discussion and inclusion. Given that it is 380
  51 pages we expect this to be done carefully and incrementally.
  52 https://ftp.libre-soc.org/simple_v_spec.pdf
  53
  54 However the
  55 process of submitting RFCs (Requests For Change), at the time of writing,
  56 still has not been publicly announced and opened up. We expect it
  57 to be very soon, but obviously could not begin any RFC Submission
  58 as part of earlier NLnet funding.  The timing is now right.
  59
  60 We will become publicly informed very shortly of the procedures but anticipate
  61 it to include development and submission of Compliance Test Suites
  62 (already partly covered by Simple-V unit tests, kindly funded by NLnet)
  63 as well as ongoing work on the Simulator.
  64
  65 # Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?
  66
  67 A lot! a full list is maintained here <https://libre-soc.org/nlnet_proposals/>
  68 and includes
  69
  70 * the world's first FOSSHW IEEE754 Formal Correctness Proofs for fadd, fsub, and fma, with support for FP Formal Proofs added to symbiyosis;
  71 * the world's first in-place Discrete Cosine Transform algorithm;
  72 * Significant improvements to Europe's only silicon-proven FOSSHW VLSI toolchain (coriolis2, by LIP6 Labs of Sorbonne University)
  73  to do an 800,000 transistor fully automated RTL2GDSII
  74 tape-out;
  75 * development of a 180nm Power ISA 3.0 "Test ASIC", the largest fully FOSSHW
  76   ASIC ever taped-out in Europe (and funded by Horizon 2020)
  77 * development of an Interoperability "Test API" for Power ISA systems,
  78   with thousands of unit tests.
  79
  80 and much more. The side-benefits alone for EU citizens are enormous.
  81
  82 # Requested Amount
  83
  84 EUR 100,000.
  85
  86 # Explain what the requested budget will be used for?
  87
  88 Time and resource, primarily manpower, to prepare and submit the documentation
  89 to OPF. To give us legal compliance for the development
  90 work carried out over the past four years, as part of the
  91 transfer to the OpenPOWER Foundation.
  92
  93 * ongoing communication with the OpenPOWER Foundation ISA Working Group
  94 * preparation of a large number of RFCs (380 pages total so far) through
  95   the External RFC Process
  96 * for each RFC accepted, work needs to be done with IBM to submit Power ISA Spec
  97   changes
  98 * for each RFC accepted, a Compliance Test Suite must be written
  99 * for each Compliance Test Suite written the results must be
 100   confirmed correct by inspection (hence the Simulator) which has
 101   as we already discovered been quite a lot of work
 102 * Along the way we aim to continue developing the "Test API" which
 103   allows running thousands of unit tests on multiple systems and
 104   cross-checking the results.  Currently we have Simulator, some
 105   "Expected Results", and the Libre-SOC HDL as well as qemu.
 106   We aim to add cavatools, gem5, Microwatt and stand-alone binary
 107   auto-generation for running on IBM POWER9 as well as Libre-SOC
 108   and Microwatt FPGAs.
 109
 110 # Compare your own project with existing or historical efforts.
 111
 112 We are developing a Cray-style Scalable Vector ISA Extension for
 113 the Supercomputing-class Power ISA.  Similar historic ISAs include
 114 Cray Y/MP, ETA-10, Cyber CDC 205. More recent is the NEC SX Aurora.
 115 They are all proprietary systems: Libre-SOC's efforts are entirely
 116 FOSSHW.
 117
 118 Open Scalable Vector ISAs include MRISC32/64 (in early development) and
 119 RISC-V RVV. Advocates of RISC-V have been discovering to their dismay
 120 that RVV and RISC-V ISA has fundamental design issues that cannot be fixed.
 121 Additionally, submission of RISCV ISA modifications requires RISCV Foundation
 122 Membership which puts us under impossible conflict of interest with
 123 Full Transparency Conditions not only with NLnet but also with
 124 EU Auditing Requirements.  By direct contrast OPF External RFC Submission
 125 does not require Secrecy.
 126
 127 ## What are significant technical challenges you expect to solve during the project, if any?
 128
 129 The main challenge is one of communication. The majority of the technical
 130 development has been done thanks to NLnet
 131 but it was so complex and comprehensive that it risks overwhelming the ISA
 132 WG Members, whose primary driver has of course been IBM for the past 25
 133 years.
 134
 135 Libre-SOC proposes taking the Power ISA into mainstream computing,
 136 including Video Decode, 3D, GPU workloads, cryptography, and Desktop
 137 and Portable devices, all of which are far different from IBM's traditional
 138 Mainframe-style multi-billion-dollar Supercomputing business.
 139 We therefore have to be both deeply respectful of their achievements, and
 140 non-disruptive to their customer base, but
 141 also appropriately assertive now that the ISA is managed by the OpenPOWER
 142 Foundation.
 143
 144 ## Describe the ecosystem of the project, and how you will engage with relevant actors and promote the outcomes?
 145
 146 Partly covered above, Libre-SOC is exclusively FOSSHW and full transparency
 147 is paramount. That said we recognise that no FOSSHW team is going to
 148 manufacture FOSS ASICs in 7nm (unless several billion dollars is available
 149 to buy a Foundry and open up its PDK). To that end RED Semiconductor Ltd
 150 has been formed by us as an Independent Entity,
 151 which will commercialise Libre-SOC's designs and handle
 152 any Commercially-confidential matters that a Transparency-committed
 153 FOSSHW team simply
 154 cannot. Thus, RS will join the OpenPOWER Foundation and help ensure,
 155 from the "other side of the fence", that matters progress smoothly
 156 for IBM and other OPF Members.
 157
 158 RED Semiconductor Ltd will the commercial point of contact for Simple-V
 159 where Organisations are unable to deal with FOSS Entities. This maximises
 160 the broad market benefit of the technology, in line with European Objectives.
 161
 162 We are already set to submit presentations through multiple Conferences
 163 as has been ongoing since 2019 as can be seen at <https://libre-soc.org/conferences> and will continue to submit press releases to
 164 OPF <https://openpowerfoundation.org/blog/libre-soc-180nm-power-isa-asic-submitted-to-imec-for-fabrication/>. Our entire development is public
 165 so is accessible to all.
 166
 167 # Extra info to be submitted
 168
 169 the budget is high because we honestly do not know yet how much work
 170 IBM and the ISA WG expects us to do.  we do however know that there
 171 will be announcements very soon. If it turns out to be less work
 172 we are more than happy to go with a proportionately smaller budget.