pinmux/pinmux_chennai_2018.tex

   1 \documentclass[slidestop]{beamer}
   2 \usepackage{beamerthemesplit}
   3 \usepackage{graphics}
   4 \usepackage{pstricks}
   5
   6 \title{SIMD}
   7 \author{Rishabh Jain}
   8 \author{Luke Kenneth Casson Leighton}
   9
  10
  11 \begin{document}
  12
  13 \frame{
  14    \begin{center}
  15     \huge{Pin Multiplexer}\\
  16     \vspace{32pt}
  17     \Large{Auto-generating documentation, code \\
  18                         and resources for a Pinmux}\\
  19     \vspace{24pt}
  20     \Large{[proposed for] Chennai 9th RISC-V Workshop}\\
  21     \vspace{16pt}
  22     \large{\today}
  23   \end{center}
  24 }
  25
  26
  27 \frame{\frametitle{Credits and Acknowledgements}
  28
  29  \begin{itemize}
  30    \item TODO\vspace{10pt}
  31   \end{itemize}
  32 }
  33
  34
  35 \frame{\frametitle{Glossary}
  36
  37  \begin{itemize}
  38    \item Pin: an I/O pad.  May be driven (input) or may drive (output).
  39    \item FN: term for a single-wire "function", such as UART\_TX,
  40              I2C\_SDA, SDMMC\_D0 etc.  may be an input, output or both
  41                  (bi-directional case: two wires are always allocated, one
  42                   for input to the function and one for output from the function).
  43    \item Input Priority Muxer: a multiplexer that has N selector
  44                  wires and N inputs, where the lowest (or highest) indexed
  45                  "selector" that is enabled results in its corresponding
  46                  input being routed to the output.
  47    \item Output Demuxer: a one-to-many "redirector" where a single
  48              input is "routed" to any one of a number of outputs, based
  49              on a selection address.
  50    \item GPIO: general-purpose reconfigureable I/O (Input/Output).
  51   \end{itemize}
  52 }
  53
  54
  55 \frame{\frametitle{Muxer cases to handle}
  56
  57  \begin{itemize}
  58    \item Many FN outputs to Many Pins: no problem\\
  59              (weird configuration by end-user, but no damage to ASIC)\vspace{10pt}
  60    \item One Pin to Many FN inputs: no problem\\
  61          (weird configuration by end-user, but no damage to ASIC)\vspace{10pt}
  62    \item Many Pins to One FN input: {\bf Priority Mux needed}\\
  63              No priority mux: Pin1 = HI, Pin0 = LO, ASIC is damaged\vspace{10pt}
  64    \item Some FNs (I2C\_SDA, SD\_D0..3) are I/O Buses\\
  65              Bi-directional control of the Pin must be handed to the
  66              FN\vspace{10pt}
  67    \item TODO\vspace{10pt}
  68   \end{itemize}
  69 }
  70
  71
  72 \frame{\frametitle{Standard GPIO 4-way in/out Mux and I/O pad}
  73  \begin{center}
  74   \includegraphics[height=2.5in]{../shakti/m_class/mygpiomux.jpg}\\
  75   {\bf 4-in, 4-out, pullup/down, hysteresis, edge-detection (EINT)}
  76  \end{center}
  77 }
  78
  79
  80 \frame{\frametitle{Register-to-pad "control" settings}
  81  \begin{center}
  82   \includegraphics[height=2.5in]{reg_gpio_cap_ctrl.jpg}\\
  83   {\bf pullup/down, hysteresis, current, edge-detection}
  84  \end{center}
  85 }
  86
  87
  88 \frame{\frametitle{In/Out muxing, direction control}
  89  \begin{center}
  90   \includegraphics[height=2.5in]{reg_gpio_fn_ctrl.jpg}\\
  91   {\bf Note: function can control I/O direction}
  92  \end{center}
  93 }
  94
  95
  96 \frame{\frametitle{Simplified I/O pad Block Diagram}
  97  \begin{center}
  98   \includegraphics[height=2.5in]{reg_gpio_pinblock.jpg}\\
  99   {\bf 3 wires: IN, OUT, OUTEN (also = !INEN) }
 100  \end{center}
 101 }
 102
 103
 104 \frame{\frametitle{Output (and OUTEN) Wiring. 2 pins, 2 GPIO, 2 Fns}
 105  \begin{center}
 106   \includegraphics[height=2.5in]{reg_gpio_out_wiring.jpg}\\
 107   {\bf Reg0 for Pin0, Reg1 for Pin1, Output and OUTEN same mux }
 108  \end{center}
 109 }
 110
 111
 112 \frame{\frametitle{Input Selection and Priority Muxing}
 113  \begin{center}
 114   \includegraphics[height=0.75in]{reg_gpio_comparator.jpg}\\
 115   {\bf Muxer enables input selection}\\
 116   \vspace{10pt}
 117   \includegraphics[height=1.25in]{reg_gpio_in_prioritymux.jpg}\\
 118   {\bf However multiple inputs must be prioritised }
 119  \end{center}
 120 }
 121
 122
 123 \frame{\frametitle{Input Mux Wiring}
 124  \begin{center}
 125   \includegraphics[height=2.5in]{reg_gpio_in_wiring.jpg}\\
 126   {\bf Pin Mux selection vals NOT same as FN selection vals}
 127  \end{center}
 128 }
 129
 130
 131 \frame{\frametitle{Summary}
 132
 133  \begin{itemize}
 134    \item TODO
 135   \end{itemize}
 136 }
 137
 138
 139 \frame{
 140   \begin{center}
 141     {\Huge The end\vspace{20pt}\\
 142                    Thank you\vspace{20pt}\\
 143                    Questions?\vspace{20pt}
 144         }
 145   \end{center}
 146
 147   \begin{itemize}
 148         \item http://libre-riscv.org/shakti/m\_class/pinmux/
 149   \end{itemize}
 150 }
 151
 152
 153 \end{document}