update slides
[libreriscv.git] / pinmux / pinmux_chennai_2018.tex
1 \documentclass[slidestop]{beamer}
2 \usepackage{beamerthemesplit}
3 \usepackage{graphics}
4 \usepackage{pstricks}
5
6 \title{SIMD}
7 \author{Rishabh Jain}
8 \author{Luke Kenneth Casson Leighton}
9
10
11 \begin{document}
12
13 \frame{
14 \begin{center}
15 \huge{Pin Multiplexer}\\
16 \vspace{32pt}
17 \Large{Auto-generating documentation, code \\
18 and resources for a Pinmux}\\
19 \vspace{24pt}
20 \Large{[proposed for] Chennai 9th RISC-V Workshop}\\
21 \vspace{16pt}
22 \large{\today}
23 \end{center}
24 }
25
26
27 \frame{\frametitle{Credits and Acknowledgements}
28
29 \begin{itemize}
30 \item TODO\vspace{10pt}
31 \end{itemize}
32 }
33
34
35 \frame{\frametitle{Glossary}
36
37 \begin{itemize}
38 \item Pin: an I/O pad. May be driven (input) or may drive (output).
39 \item FN: term for a single-wire "function", such as UART\_TX,
40 I2C\_SDA, SDMMC\_D0 etc. may be an input, output or both
41 (bi-directional: separate wires are always allocated).
42 \item TODO\vspace{10pt}
43 \end{itemize}
44 }
45
46
47 \frame{\frametitle{Muxer cases to handle}
48
49 \begin{itemize}
50 \item Many FN outputs to Many Pins: no problem\\
51 (weird configuration by end-user, but no damage to ASIC)\vspace{10pt}
52 \item One Pin to Many FN inputs: no problem\\
53 (weird configuration by end-user, but no damage to ASIC)\vspace{10pt}
54 \item Many Pins to One FN input {\bf Priority Mux needed}\\
55 No priority mux: Pin1 = HI, Pin0 = LO, ASIC is damaged\vspace{10pt}
56 \item Some FNs (I2C\_SDA, SD\_D0..3) are I/O Buses\\
57 Bi-directional control of the Pin must be handed to the
58 FN\vspace{10pt}
59 \item TODO\vspace{10pt}
60 \end{itemize}
61 }
62
63
64 \frame{\frametitle{Standard GPIO 4-way in/out Mux and I/O pad}
65 \begin{center}
66 \includegraphics[height=2.5in]{../shakti/m_class/mygpiomux.jpg}\\
67 {\bf 4-in, 4-out, pullup/down, hysteresis, edge-detection (EINT)}
68 \end{center}
69 }
70
71
72 \frame{\frametitle{Register-to-pad "control" settings}
73 \begin{center}
74 \includegraphics[height=2.5in]{reg_gpio_cap_ctrl.jpg}\\
75 {\bf pullup/down, hysteresis, current, edge-detection}
76 \end{center}
77 }
78
79
80 \frame{\frametitle{In/Out muxing, direction control}
81 \begin{center}
82 \includegraphics[height=2.5in]{reg_gpio_fn_ctrl.jpg}\\
83 {\bf Note: function can control I/O direction}
84 \end{center}
85 }
86
87
88 \frame{\frametitle{Simplified I/O pad Block Diagram}
89 \begin{center}
90 \includegraphics[height=2.5in]{reg_gpio_pinblock.jpg}\\
91 {\bf 3 wires: IN, OUT, OUTEN (also = !INEN) }
92 \end{center}
93 }
94
95
96 \frame{\frametitle{Output (and OUTEN) Wiring. 2 pins, 2 GPIO, 2 Fns}
97 \begin{center}
98 \includegraphics[height=2.5in]{reg_gpio_out_wiring.jpg}\\
99 {\bf Reg0 for Pin0, Reg1 for Pin1, Output and OUTEN same mux }
100 \end{center}
101 }
102
103
104 \frame{\frametitle{Input Selection and Priority Muxing}
105 \begin{center}
106 \includegraphics[height=0.75in]{reg_gpio_comparator.jpg}\\
107 {\bf Muxer enables input selection}\\
108 \vspace{10pt}
109 \includegraphics[height=1.25in]{reg_gpio_in_prioritymux.jpg}\\
110 {\bf However multiple inputs must be prioritised }
111 \end{center}
112 }
113
114
115 \frame{\frametitle{Input Mux Wiring}
116 \begin{center}
117 \includegraphics[height=2.5in]{reg_gpio_in_wiring.jpg}\\
118 {\bf Pin Mux selection vals NOT same as FN selection vals}
119 \end{center}
120 }
121
122
123 \frame{\frametitle{Summary}
124
125 \begin{itemize}
126 \item TODO
127 \end{itemize}
128 }
129
130
131 \frame{
132 \begin{center}
133 {\Huge The end\vspace{20pt}\\
134 Thank you\vspace{20pt}\\
135 Questions?\vspace{20pt}
136 }
137 \end{center}
138
139 \begin{itemize}
140 \item http://libre-riscv.org/shakti/m\_class/pinmux/
141 \end{itemize}
142 }
143
144
145 \end{document}