resources.mdwn

   1 # Resources and Specifications
   2
   3 This page aims to collect all the resources and specifications we need
   4 in one place for quick access. We will try our best to keep links here
   5 up-to-date. Feel free to add more links here.
   6
   7 # RISC-V Instruction Set Architecture
   8
   9 The Libre RISC-V Project is building a hybrid CPU/GPU SoC. As the name
  10 of the project implies, we will be following the RISC-V ISA due to it
  11 being open-source and also because of the huge software and hardware
  12 ecosystem building around it. There are other open-source ISAs but none
  13 of them have the same momentum and energy behind it as RISC-V.
  14
  15 To fully take advantage of the RISC-V ecosystem, it is important to be
  16 compliant with the RISC-V standards. Doing so will allow us to to reuse
  17 most software as-is and avoid major forks.
  18
  19 * Official compiled PDFs of RISC-V ISA Manual:
  20   <https://github.com/riscv/riscv-isa-manual/releases/latest>
  21 * Working draft of the proposed RISC-V Bitmanipulation extension:
  22   <https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-draft.pdf>
  23 * RISC-V "V" Vector Extension:
  24   <https://riscv.github.io/documents/riscv-v-spec/>
  25
  26 Note: As far as I know, we aren't using the RISC-V V Extension directly
  27 at the moment. However, there are many wiki pages that make a reference
  28 to the V extension so it would be good to include it here as a reference
  29 for comparative/informative purposes with regard to Simple-V.
  30
  31 # IEEE Standard for Floating-Point Arithmetic (IEEE 754)
  32
  33 Almost all modern computers follow the IEEE Floating-Point Standard. Of
  34 course, we will follow it as well for interoperability.
  35
  36 * IEEE 754-2019: <https://standards.ieee.org/standard/754-2019.html>
  37
  38 Note: Even though this is such an important standard used by everyone,
  39 it is unfortunately not freely available and requires a payment to
  40 access. However, each of the Libre RISC-V members already have access
  41 to the document.
  42
  43 # Khronos Standards
  44
  45 The Khronos Group creates open standards for authoring and acceleration
  46 of graphics, media, and computation. It is a requirement for our hybrid
  47 CPU/GPU to be compliant with these standards *as well* as with IEEE754,
  48 in order to be commercially-competitive in both areas: especially Vulkan
  49 and OpenCL being the most important. SPIR-V is also important for the
  50 Kazan driver.
  51
  52 Thus the [[zfpacc_proposal]] has been created which permits runtime dynamic
  53 switching between different accuracy levels, in userspace applications.
  54
  55 **SPIR-V Main Page <https://www.khronos.org/registry/spir-v/>**
  56
  57 * SPIR-V 1.5 Specification Revision 1:
  58   <https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html>
  59 * SPIR-V OpenCL Extended Instruction Set:
  60   <https://www.khronos.org/registry/spir-v/specs/unified1/OpenCL.ExtendedInstructionSet.100.html>
  61 * SPIR-V GLSL Extended Instruction Set:
  62   <https://www.khronos.org/registry/spir-v/specs/unified1/GLSL.std.450.html>
  63
  64 **Vulkan Main Page <https://www.khronos.org/registry/vulkan/>**
  65
  66 * Vulkan 1.1.122:
  67   <https://www.khronos.org/registry/vulkan/specs/1.1-extensions/html/index.html>
  68
  69 **OpenCL Main Page <https://www.khronos.org/registry/OpenCL/>**
  70
  71 * OpenCL 2.2 API Specification:
  72   <https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_API.html>
  73 * OpenCL 2.2 Extension Specification:
  74   <https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_Ext.html>
  75 * OpenCL 2.2 SPIR-V Environment Specification:
  76   <https://www.khronos.org/registry/OpenCL/specs/2.2/html/OpenCL_Env.html>
  77
  78 Note: We are implementing hardware accelerated Vulkan and
  79 OpenCL while relying on other software projects to translate APIs to
  80 Vulkan. E.g. Zink allows for OpenGL-to-Vulkan in software.
  81
  82 # Graphics and Compute API Stack
  83
  84 I found this informative post that mentions Kazan and a whole bunch of
  85 other stuff. It looks like *many* APIs can be emulated on top of Vulkan,
  86 although performance is not evaluated.
  87
  88 <https://synappsis.wordpress.com/2017/06/03/opengl-over-vulkan-dev/>
  89
  90 # Free Silicon Conference
  91
  92 The conference brought together experts and enthusiasts who want to build
  93 a complete Free and Open Source CAD ecosystem for designing analog and
  94 digital integrated circuits.  The conference covered the full spectrum of
  95 the design process, from system architecture, to layout and verification.
  96
  97 * <https://wiki.f-si.org/index.php/FSiC2019#Foundries.2C_PDKs_and_cell_libraries>
  98
  99 * LIP6's Coriolis - a set of backend design tools:
 100   <https://www-soc.lip6.fr/equipe-cian/logiciels/coriolis/>
 101
 102 Note: The rest of LIP6's website is in French, but there is a UK flag
 103 in the corner that gives the English version.
 104
 105 * KLayout - Layout viewer and editor: <https://www.klayout.de/>
 106
 107 # The OpenROAD Project
 108
 109 OpenROAD seeks to develop and foster an autonomous, 24-hour, open-source
 110 layout generation flow (RTL-to-GDS).
 111
 112 * <https://theopenroadproject.org/>
 113
 114 # Other RISC-V GPU attempts
 115
 116 * <https://fossi-foundation.org/2019/09/03/gsoc-64b-pointers-in-rv32>
 117
 118 * <http://bjump.org/manycore/>
 119
 120 * <https://resharma.github.io/RISCV32-GPU/>
 121
 122 TODO: Get in touch and discuss collaboration
 123
 124 # Tests, Benchmarks, Conformance, Compliance, Verification, etc.
 125
 126 ## RISC-V Tests
 127
 128 RISC-V Foundation is in the process of creating an official conformance
 129 test. It's still in development as far as I can tell.
 130
 131 * //TODO LINK TO RISC-V CONFORMANCE TEST
 132
 133 ## IEEE 754 Tests
 134
 135 IEEE 754 has no official tests for floating-point but there are several
 136 well-known third party tools to check such as John Hauser's SoftFloat
 137 and TestFloat.
 138
 139 * <http://www.jhauser.us/arithmetic/>
 140
 141 Jacob is also making a Rust library to check IEEE 754 operations.
 142
 143 * <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-September/002737.html>
 144
 145 A cool paper I came across in my research is "IeeeCC754++ : An Advanced
 146 Set of Tools to Check IEEE 754-2008 Conformity" by Dr. Matthias Hüsken.
 147
 148 * Direct link to PDF:
 149   <http://elpub.bib.uni-wuppertal.de/servlets/DerivateServlet/Derivate-7505/dc1735.pdf>
 150
 151 ## Khronos Tests
 152
 153 OpenCL Conformance Tests
 154
 155 * <https://github.com/KhronosGroup/OpenCL-CTS>
 156
 157 Vulkan Conformance Tests
 158
 159 * <https://github.com/KhronosGroup/VK-GL-CTS>
 160
 161 MAJOR NOTE: We are **not** allowed to say we are compliant with any of
 162 the Khronos standards until we actually make an official submission,
 163 do the paperwork, and pay the relevant fees.
 164
 165 ## Formal Verification
 166
 167 Formal verification of Libre RISC-V ensures that it is bug-free in
 168 regards to what we specify.  Of course, it is important to do the formal
 169 verification as a final step in the development process before we produce
 170 thousands or millions of silicon.
 171
 172 Some learning resources I found in the community:
 173
 174 * ZipCPU: <http://zipcpu.com/>
 175
 176 ZipCPU provides a comprehensive tutorial for beginners and many exercises/quizzes/slides: <http://zipcpu.com/tutorial/>
 177
 178
 179 * Western Digital's SweRV CPU blog (I recommend looking at all their posts): <https://tomverbeure.github.io/>
 180
 181 <https://tomverbeure.github.io/risc-v/2018/11/19/A-Bug-Free-RISC-V-Core-without-Simulation.html>
 182
 183 <https://tomverbeure.github.io/rtl/2019/01/04/Under-the-Hood-of-Formal-Verification.html>
 184
 185 ## Automation
 186
 187 * <https://www.ohwr.org/project/wishbone-gen>
 188
 189 # Libre-RISC-V Standards
 190
 191 This list auto-generated from a page tag "standards":
 192
 193 [[!inline pages="tagged(standards)" actions="no" archive="yes" quick="yes"]]
 194
 195