f6f2009b7e3890240d6d779729da22349bc1c34c
[riscv-isa-sim.git] / riscv / debug_module.h
1 // See LICENSE for license details.
2 #ifndef _RISCV_DEBUG_MODULE_H
3 #define _RISCV_DEBUG_MODULE_H
4
5 #include <set>
6
7 #include "devices.h"
8
9 class sim_t;
10
11 typedef struct {
12 bool haltreq;
13 bool resumereq;
14 unsigned hartsel;
15 bool hartreset;
16 bool dmactive;
17 bool ndmreset;
18 } dmcontrol_t;
19
20 typedef struct {
21 bool allnonexistant;
22 bool anynonexistant;
23 bool allunavail;
24 bool anyunavail;
25 bool allrunning;
26 bool anyrunning;
27 bool allhalted;
28 bool anyhalted;
29 bool allresumeack;
30 bool anyresumeack;
31 bool authenticated;
32 bool authbusy;
33 bool cfgstrvalid;
34 unsigned version;
35 } dmstatus_t;
36
37 typedef enum cmderr {
38 CMDERR_NONE = 0,
39 CMDERR_BUSY = 1,
40 CMDERR_NOTSUP = 2,
41 CMDERR_EXCEPTION = 3,
42 CMDERR_HALTRESUME = 4,
43 CMDERR_OTHER = 7
44 } cmderr_t;
45
46 typedef struct {
47 bool busy;
48 unsigned datacount;
49 unsigned progbufsize;
50 cmderr_t cmderr;
51 } abstractcs_t;
52
53 typedef struct {
54 unsigned autoexecprogbuf;
55 unsigned autoexecdata;
56 } abstractauto_t;
57
58 class debug_module_t : public abstract_device_t
59 {
60 public:
61 debug_module_t(sim_t *sim, unsigned progbufsize);
62 ~debug_module_t();
63
64 void add_device(bus_t *bus);
65
66 bool load(reg_t addr, size_t len, uint8_t* bytes);
67 bool store(reg_t addr, size_t len, const uint8_t* bytes);
68
69 // Debug Module Interface that the debugger (in our case through JTAG DTM)
70 // uses to access the DM.
71 // Return true for success, false for failure.
72 bool dmi_read(unsigned address, uint32_t *value);
73 bool dmi_write(unsigned address, uint32_t value);
74
75 private:
76 static const unsigned datasize = 2;
77 // Size of program_buffer in 32-bit words, as exposed to the rest of the
78 // world.
79 unsigned progbufsize;
80 // Actual size of the program buffer, which is 1 word bigger than we let on
81 // to implement the implicit ebreak at the end.
82 unsigned program_buffer_bytes;
83 static const unsigned debug_data_start = 0x380;
84 unsigned debug_progbuf_start;
85
86 static const unsigned debug_abstract_size = 2;
87 unsigned debug_abstract_start;
88
89 sim_t *sim;
90
91 uint8_t debug_rom_whereto[4];
92 uint8_t debug_abstract[debug_abstract_size * 4];
93 uint8_t *program_buffer;
94 uint8_t dmdata[datasize * 4];
95
96 bool halted[1024];
97 bool resumeack[1024];
98 uint8_t debug_rom_flags[1024];
99
100 void write32(uint8_t *rom, unsigned int index, uint32_t value);
101 uint32_t read32(uint8_t *rom, unsigned int index);
102
103 dmcontrol_t dmcontrol;
104 dmstatus_t dmstatus;
105 abstractcs_t abstractcs;
106 abstractauto_t abstractauto;
107 uint32_t command;
108
109 processor_t *current_proc() const;
110 void reset();
111 bool perform_abstract_command();
112 };
113
114 #endif