riscv/execute.h

   1 /* Automatically generated by parse-opcodes */
   2 switch((insn.bits >> 0x0) & 0x7f)
   3 {
   4   case 0x0:
   5   {
   6     #include "insns/c_addi.h"
   7     break;
   8   }
   9   case 0x1:
  10   {
  11     #include "insns/c_li.h"
  12     break;
  13   }
  14   case 0x2:
  15   {
  16     switch((insn.bits >> 0x7) & 0x7)
  17     {
  18       case 0x0:
  19       {
  20         if((insn.bits & 0x801f) == 0x2)
  21         {
  22           #include "insns/c_move.h"
  23           break;
  24         }
  25         if((insn.bits & 0x801f) == 0x8002)
  26         {
  27           #include "insns/c_j.h"
  28           break;
  29         }
  30         throw trap_illegal_instruction;
  31       }
  32       case 0x1:
  33       {
  34         if((insn.bits & 0x801f) == 0x2)
  35         {
  36           #include "insns/c_move.h"
  37           break;
  38         }
  39         if((insn.bits & 0x801f) == 0x8002)
  40         {
  41           #include "insns/c_j.h"
  42           break;
  43         }
  44         throw trap_illegal_instruction;
  45       }
  46       case 0x2:
  47       {
  48         if((insn.bits & 0x801f) == 0x2)
  49         {
  50           #include "insns/c_move.h"
  51           break;
  52         }
  53         if((insn.bits & 0x801f) == 0x8002)
  54         {
  55           #include "insns/c_j.h"
  56           break;
  57         }
  58         throw trap_illegal_instruction;
  59       }
  60       case 0x3:
  61       {
  62         if((insn.bits & 0x801f) == 0x2)
  63         {
  64           #include "insns/c_move.h"
  65           break;
  66         }
  67         if((insn.bits & 0x801f) == 0x8002)
  68         {
  69           #include "insns/c_j.h"
  70           break;
  71         }
  72         throw trap_illegal_instruction;
  73       }
  74       case 0x4:
  75       {
  76         if((insn.bits & 0x801f) == 0x2)
  77         {
  78           #include "insns/c_move.h"
  79           break;
  80         }
  81         if((insn.bits & 0x801f) == 0x8002)
  82         {
  83           #include "insns/c_j.h"
  84           break;
  85         }
  86         throw trap_illegal_instruction;
  87       }
  88       case 0x5:
  89       {
  90         if((insn.bits & 0x801f) == 0x2)
  91         {
  92           #include "insns/c_move.h"
  93           break;
  94         }
  95         if((insn.bits & 0x801f) == 0x8002)
  96         {
  97           #include "insns/c_j.h"
  98           break;
  99         }
 100         throw trap_illegal_instruction;
 101       }
 102       case 0x6:
 103       {
 104         if((insn.bits & 0x801f) == 0x2)
 105         {
 106           #include "insns/c_move.h"
 107           break;
 108         }
 109         if((insn.bits & 0x801f) == 0x8002)
 110         {
 111           #include "insns/c_j.h"
 112           break;
 113         }
 114         throw trap_illegal_instruction;
 115       }
 116       case 0x7:
 117       {
 118         if((insn.bits & 0x801f) == 0x2)
 119         {
 120           #include "insns/c_move.h"
 121           break;
 122         }
 123         if((insn.bits & 0x801f) == 0x8002)
 124         {
 125           #include "insns/c_j.h"
 126           break;
 127         }
 128         throw trap_illegal_instruction;
 129       }
 130       default:
 131       {
 132         throw trap_illegal_instruction;
 133       }
 134     }
 135     break;
 136   }
 137   case 0x3:
 138   {
 139     switch((insn.bits >> 0x7) & 0x7)
 140     {
 141       case 0x0:
 142       {
 143         #include "insns/lb.h"
 144         break;
 145       }
 146       case 0x1:
 147       {
 148         #include "insns/lh.h"
 149         break;
 150       }
 151       case 0x2:
 152       {
 153         #include "insns/lw.h"
 154         break;
 155       }
 156       case 0x3:
 157       {
 158         #include "insns/ld.h"
 159         break;
 160       }
 161       case 0x4:
 162       {
 163         #include "insns/lbu.h"
 164         break;
 165       }
 166       case 0x5:
 167       {
 168         #include "insns/lhu.h"
 169         break;
 170       }
 171       case 0x6:
 172       {
 173         #include "insns/lwu.h"
 174         break;
 175       }
 176       default:
 177       {
 178         throw trap_illegal_instruction;
 179       }
 180     }
 181     break;
 182   }
 183   case 0x4:
 184   {
 185     #include "insns/c_ldsp.h"
 186     break;
 187   }
 188   case 0x5:
 189   {
 190     #include "insns/c_lwsp.h"
 191     break;
 192   }
 193   case 0x6:
 194   {
 195     #include "insns/c_sdsp.h"
 196     break;
 197   }
 198   case 0x7:
 199   {
 200     switch((insn.bits >> 0x7) & 0x7)
 201     {
 202       case 0x2:
 203       {
 204         #include "insns/flw.h"
 205         break;
 206       }
 207       case 0x3:
 208       {
 209         #include "insns/fld.h"
 210         break;
 211       }
 212       default:
 213       {
 214         throw trap_illegal_instruction;
 215       }
 216     }
 217     break;
 218   }
 219   case 0x8:
 220   {
 221     #include "insns/c_swsp.h"
 222     break;
 223   }
 224   case 0x9:
 225   {
 226     #include "insns/c_ld.h"
 227     break;
 228   }
 229   case 0xa:
 230   {
 231     #include "insns/c_lw.h"
 232     break;
 233   }
 234   case 0xb:
 235   {
 236     switch((insn.bits >> 0x7) & 0x7)
 237     {
 238       case 0x0:
 239       {
 240         if((insn.bits & 0x1ffff) == 0x280b)
 241         {
 242           #include "insns/sbseg_v.h"
 243           break;
 244         }
 245         if((insn.bits & 0x1ffff) == 0x100b)
 246         {
 247           #include "insns/lbst_v.h"
 248           break;
 249         }
 250         if((insn.bits & 0x1ffff) == 0x180b)
 251         {
 252           #include "insns/sbst_v.h"
 253           break;
 254         }
 255         if((insn.bits & 0x3fffff) == 0xb)
 256         {
 257           #include "insns/lb_v.h"
 258           break;
 259         }
 260         if((insn.bits & 0x1ffff) == 0x200b)
 261         {
 262           #include "insns/lbseg_v.h"
 263           break;
 264         }
 265         if((insn.bits & 0x3fffff) == 0x1000b)
 266         {
 267           #include "insns/mov_vv.h"
 268           break;
 269         }
 270         if((insn.bits & 0x3fffff) == 0x1800b)
 271         {
 272           #include "insns/fmov_vv.h"
 273           break;
 274         }
 275         if((insn.bits & 0x3fffff) == 0x80b)
 276         {
 277           #include "insns/sb_v.h"
 278           break;
 279         }
 280         throw trap_illegal_instruction;
 281       }
 282       case 0x1:
 283       {
 284         if((insn.bits & 0x1ffff) == 0x208b)
 285         {
 286           #include "insns/lhseg_v.h"
 287           break;
 288         }
 289         if((insn.bits & 0x1ffff) == 0x108b)
 290         {
 291           #include "insns/lhst_v.h"
 292           break;
 293         }
 294         if((insn.bits & 0x3fffff) == 0x1008b)
 295         {
 296           #include "insns/mov_sv.h"
 297           break;
 298         }
 299         if((insn.bits & 0x3fffff) == 0x1808b)
 300         {
 301           #include "insns/fmov_sv.h"
 302           break;
 303         }
 304         if((insn.bits & 0x3fffff) == 0x8b)
 305         {
 306           #include "insns/lh_v.h"
 307           break;
 308         }
 309         if((insn.bits & 0x3fffff) == 0x88b)
 310         {
 311           #include "insns/sh_v.h"
 312           break;
 313         }
 314         if((insn.bits & 0x1ffff) == 0x288b)
 315         {
 316           #include "insns/shseg_v.h"
 317           break;
 318         }
 319         if((insn.bits & 0x1ffff) == 0x188b)
 320         {
 321           #include "insns/shst_v.h"
 322           break;
 323         }
 324         throw trap_illegal_instruction;
 325       }
 326       case 0x2:
 327       {
 328         if((insn.bits & 0x3fffff) == 0x10b)
 329         {
 330           #include "insns/lw_v.h"
 331           break;
 332         }
 333         if((insn.bits & 0x1ffff) == 0x1810b)
 334         {
 335           #include "insns/fmov_su.h"
 336           break;
 337         }
 338         if((insn.bits & 0x1ffff) == 0x290b)
 339         {
 340           #include "insns/swseg_v.h"
 341           break;
 342         }
 343         if((insn.bits & 0x1ffff) == 0x1010b)
 344         {
 345           #include "insns/mov_su.h"
 346           break;
 347         }
 348         if((insn.bits & 0x1ffff) == 0x1d0b)
 349         {
 350           #include "insns/fswst_v.h"
 351           break;
 352         }
 353         if((insn.bits & 0x1ffff) == 0x190b)
 354         {
 355           #include "insns/swst_v.h"
 356           break;
 357         }
 358         if((insn.bits & 0x3fffff) == 0xd0b)
 359         {
 360           #include "insns/fsw_v.h"
 361           break;
 362         }
 363         if((insn.bits & 0x1ffff) == 0x250b)
 364         {
 365           #include "insns/flwseg_v.h"
 366           break;
 367         }
 368         if((insn.bits & 0x3fffff) == 0x50b)
 369         {
 370           #include "insns/flw_v.h"
 371           break;
 372         }
 373         if((insn.bits & 0x3fffff) == 0x90b)
 374         {
 375           #include "insns/sw_v.h"
 376           break;
 377         }
 378         if((insn.bits & 0x1ffff) == 0x150b)
 379         {
 380           #include "insns/flwst_v.h"
 381           break;
 382         }
 383         if((insn.bits & 0x1ffff) == 0x210b)
 384         {
 385           #include "insns/lwseg_v.h"
 386           break;
 387         }
 388         if((insn.bits & 0x1ffff) == 0x2d0b)
 389         {
 390           #include "insns/fswseg_v.h"
 391           break;
 392         }
 393         if((insn.bits & 0x1ffff) == 0x110b)
 394         {
 395           #include "insns/lwst_v.h"
 396           break;
 397         }
 398         throw trap_illegal_instruction;
 399       }
 400       case 0x3:
 401       {
 402         if((insn.bits & 0x1ffff) == 0x218b)
 403         {
 404           #include "insns/ldseg_v.h"
 405           break;
 406         }
 407         if((insn.bits & 0x3fffff) == 0x58b)
 408         {
 409           #include "insns/fld_v.h"
 410           break;
 411         }
 412         if((insn.bits & 0x3fffff) == 0x18b)
 413         {
 414           #include "insns/ld_v.h"
 415           break;
 416         }
 417         if((insn.bits & 0x3fffff) == 0xd8b)
 418         {
 419           #include "insns/fsd_v.h"
 420           break;
 421         }
 422         if((insn.bits & 0x1ffff) == 0x2d8b)
 423         {
 424           #include "insns/fsdseg_v.h"
 425           break;
 426         }
 427         if((insn.bits & 0x1ffff) == 0x1d8b)
 428         {
 429           #include "insns/fsdst_v.h"
 430           break;
 431         }
 432         if((insn.bits & 0x1ffff) == 0x118b)
 433         {
 434           #include "insns/ldst_v.h"
 435           break;
 436         }
 437         if((insn.bits & 0x1ffff) == 0x258b)
 438         {
 439           #include "insns/fldseg_v.h"
 440           break;
 441         }
 442         if((insn.bits & 0x1ffff) == 0x1018b)
 443         {
 444           #include "insns/mov_us.h"
 445           break;
 446         }
 447         if((insn.bits & 0x1ffff) == 0x158b)
 448         {
 449           #include "insns/fldst_v.h"
 450           break;
 451         }
 452         if((insn.bits & 0x1ffff) == 0x298b)
 453         {
 454           #include "insns/sdseg_v.h"
 455           break;
 456         }
 457         if((insn.bits & 0x1ffff) == 0x1818b)
 458         {
 459           #include "insns/fmov_us.h"
 460           break;
 461         }
 462         if((insn.bits & 0x3fffff) == 0x98b)
 463         {
 464           #include "insns/sd_v.h"
 465           break;
 466         }
 467         if((insn.bits & 0x1ffff) == 0x198b)
 468         {
 469           #include "insns/sdst_v.h"
 470           break;
 471         }
 472         throw trap_illegal_instruction;
 473       }
 474       case 0x4:
 475       {
 476         if((insn.bits & 0x3fffff) == 0x20b)
 477         {
 478           #include "insns/lbu_v.h"
 479           break;
 480         }
 481         if((insn.bits & 0x1ffff) == 0x220b)
 482         {
 483           #include "insns/lbuseg_v.h"
 484           break;
 485         }
 486         if((insn.bits & 0x1ffff) == 0x120b)
 487         {
 488           #include "insns/lbust_v.h"
 489           break;
 490         }
 491         throw trap_illegal_instruction;
 492       }
 493       case 0x5:
 494       {
 495         if((insn.bits & 0x1ffff) == 0x128b)
 496         {
 497           #include "insns/lhust_v.h"
 498           break;
 499         }
 500         if((insn.bits & 0x3fffff) == 0x28b)
 501         {
 502           #include "insns/lhu_v.h"
 503           break;
 504         }
 505         if((insn.bits & 0x1ffff) == 0x228b)
 506         {
 507           #include "insns/lhuseg_v.h"
 508           break;
 509         }
 510         throw trap_illegal_instruction;
 511       }
 512       case 0x6:
 513       {
 514         if((insn.bits & 0x1ffff) == 0x230b)
 515         {
 516           #include "insns/lwuseg_v.h"
 517           break;
 518         }
 519         if((insn.bits & 0x3fffff) == 0x30b)
 520         {
 521           #include "insns/lwu_v.h"
 522           break;
 523         }
 524         if((insn.bits & 0x1ffff) == 0x130b)
 525         {
 526           #include "insns/lwust_v.h"
 527           break;
 528         }
 529         throw trap_illegal_instruction;
 530       }
 531       default:
 532       {
 533         throw trap_illegal_instruction;
 534       }
 535     }
 536     break;
 537   }
 538   case 0xc:
 539   {
 540     #include "insns/c_sd.h"
 541     break;
 542   }
 543   case 0xd:
 544   {
 545     #include "insns/c_sw.h"
 546     break;
 547   }
 548   case 0xf:
 549   {
 550     switch((insn.bits >> 0x7) & 0x7)
 551     {
 552       case 0x0:
 553       {
 554         if((insn.bits & 0xfff) == 0x80f)
 555         {
 556           #include "insns/sbsegst_v.h"
 557           break;
 558         }
 559         if((insn.bits & 0xfff) == 0xf)
 560         {
 561           #include "insns/lbsegst_v.h"
 562           break;
 563         }
 564         throw trap_illegal_instruction;
 565       }
 566       case 0x1:
 567       {
 568         if((insn.bits & 0xfff) == 0x88f)
 569         {
 570           #include "insns/shsegst_v.h"
 571           break;
 572         }
 573         if((insn.bits & 0xfff) == 0x8f)
 574         {
 575           #include "insns/lhsegst_v.h"
 576           break;
 577         }
 578         throw trap_illegal_instruction;
 579       }
 580       case 0x2:
 581       {
 582         if((insn.bits & 0xfff) == 0xd0f)
 583         {
 584           #include "insns/fswsegst_v.h"
 585           break;
 586         }
 587         if((insn.bits & 0xfff) == 0x50f)
 588         {
 589           #include "insns/flwsegst_v.h"
 590           break;
 591         }
 592         if((insn.bits & 0xfff) == 0x10f)
 593         {
 594           #include "insns/lwsegst_v.h"
 595           break;
 596         }
 597         if((insn.bits & 0xfff) == 0x90f)
 598         {
 599           #include "insns/swsegst_v.h"
 600           break;
 601         }
 602         throw trap_illegal_instruction;
 603       }
 604       case 0x3:
 605       {
 606         if((insn.bits & 0xfff) == 0x18f)
 607         {
 608           #include "insns/ldsegst_v.h"
 609           break;
 610         }
 611         if((insn.bits & 0xfff) == 0x98f)
 612         {
 613           #include "insns/sdsegst_v.h"
 614           break;
 615         }
 616         if((insn.bits & 0xfff) == 0x58f)
 617         {
 618           #include "insns/fldsegst_v.h"
 619           break;
 620         }
 621         if((insn.bits & 0xfff) == 0xd8f)
 622         {
 623           #include "insns/fsdsegst_v.h"
 624           break;
 625         }
 626         throw trap_illegal_instruction;
 627       }
 628       case 0x4:
 629       {
 630         if((insn.bits & 0xfff) == 0x20f)
 631         {
 632           #include "insns/lbusegst_v.h"
 633           break;
 634         }
 635         throw trap_illegal_instruction;
 636       }
 637       case 0x5:
 638       {
 639         if((insn.bits & 0xfff) == 0x28f)
 640         {
 641           #include "insns/lhusegst_v.h"
 642           break;
 643         }
 644         throw trap_illegal_instruction;
 645       }
 646       case 0x6:
 647       {
 648         if((insn.bits & 0xfff) == 0x30f)
 649         {
 650           #include "insns/lwusegst_v.h"
 651           break;
 652         }
 653         throw trap_illegal_instruction;
 654       }
 655       default:
 656       {
 657         throw trap_illegal_instruction;
 658       }
 659     }
 660     break;
 661   }
 662   case 0x10:
 663   {
 664     #include "insns/c_beq.h"
 665     break;
 666   }
 667   case 0x11:
 668   {
 669     #include "insns/c_bne.h"
 670     break;
 671   }
 672   case 0x13:
 673   {
 674     switch((insn.bits >> 0x7) & 0x7)
 675     {
 676       case 0x0:
 677       {
 678         #include "insns/addi.h"
 679         break;
 680       }
 681       case 0x1:
 682       {
 683         if((insn.bits & 0x3f03ff) == 0x93)
 684         {
 685           #include "insns/slli.h"
 686           break;
 687         }
 688         throw trap_illegal_instruction;
 689       }
 690       case 0x2:
 691       {
 692         #include "insns/slti.h"
 693         break;
 694       }
 695       case 0x3:
 696       {
 697         #include "insns/sltiu.h"
 698         break;
 699       }
 700       case 0x4:
 701       {
 702         #include "insns/xori.h"
 703         break;
 704       }
 705       case 0x5:
 706       {
 707         if((insn.bits & 0x3f03ff) == 0x293)
 708         {
 709           #include "insns/srli.h"
 710           break;
 711         }
 712         if((insn.bits & 0x3f03ff) == 0x10293)
 713         {
 714           #include "insns/srai.h"
 715           break;
 716         }
 717         throw trap_illegal_instruction;
 718       }
 719       case 0x6:
 720       {
 721         #include "insns/ori.h"
 722         break;
 723       }
 724       case 0x7:
 725       {
 726         #include "insns/andi.h"
 727         break;
 728       }
 729       default:
 730       {
 731         throw trap_illegal_instruction;
 732       }
 733     }
 734     break;
 735   }
 736   case 0x1b:
 737   {
 738     switch((insn.bits >> 0x7) & 0x7)
 739     {
 740       case 0x0:
 741       {
 742         #include "insns/addiw.h"
 743         break;
 744       }
 745       case 0x1:
 746       {
 747         if((insn.bits & 0x3f83ff) == 0x9b)
 748         {
 749           #include "insns/slliw.h"
 750           break;
 751         }
 752         throw trap_illegal_instruction;
 753       }
 754       case 0x5:
 755       {
 756         if((insn.bits & 0x3f83ff) == 0x29b)
 757         {
 758           #include "insns/srliw.h"
 759           break;
 760         }
 761         if((insn.bits & 0x3f83ff) == 0x1029b)
 762         {
 763           #include "insns/sraiw.h"
 764           break;
 765         }
 766         throw trap_illegal_instruction;
 767       }
 768       default:
 769       {
 770         throw trap_illegal_instruction;
 771       }
 772     }
 773     break;
 774   }
 775   case 0x20:
 776   {
 777     #include "insns/c_addi.h"
 778     break;
 779   }
 780   case 0x21:
 781   {
 782     #include "insns/c_li.h"
 783     break;
 784   }
 785   case 0x22:
 786   {
 787     switch((insn.bits >> 0x7) & 0x7)
 788     {
 789       case 0x0:
 790       {
 791         if((insn.bits & 0x801f) == 0x2)
 792         {
 793           #include "insns/c_move.h"
 794           break;
 795         }
 796         if((insn.bits & 0x801f) == 0x8002)
 797         {
 798           #include "insns/c_j.h"
 799           break;
 800         }
 801         throw trap_illegal_instruction;
 802       }
 803       case 0x1:
 804       {
 805         if((insn.bits & 0x801f) == 0x2)
 806         {
 807           #include "insns/c_move.h"
 808           break;
 809         }
 810         if((insn.bits & 0x801f) == 0x8002)
 811         {
 812           #include "insns/c_j.h"
 813           break;
 814         }
 815         throw trap_illegal_instruction;
 816       }
 817       case 0x2:
 818       {
 819         if((insn.bits & 0x801f) == 0x2)
 820         {
 821           #include "insns/c_move.h"
 822           break;
 823         }
 824         if((insn.bits & 0x801f) == 0x8002)
 825         {
 826           #include "insns/c_j.h"
 827           break;
 828         }
 829         throw trap_illegal_instruction;
 830       }
 831       case 0x3:
 832       {
 833         if((insn.bits & 0x801f) == 0x2)
 834         {
 835           #include "insns/c_move.h"
 836           break;
 837         }
 838         if((insn.bits & 0x801f) == 0x8002)
 839         {
 840           #include "insns/c_j.h"
 841           break;
 842         }
 843         throw trap_illegal_instruction;
 844       }
 845       case 0x4:
 846       {
 847         if((insn.bits & 0x801f) == 0x2)
 848         {
 849           #include "insns/c_move.h"
 850           break;
 851         }
 852         if((insn.bits & 0x801f) == 0x8002)
 853         {
 854           #include "insns/c_j.h"
 855           break;
 856         }
 857         throw trap_illegal_instruction;
 858       }
 859       case 0x5:
 860       {
 861         if((insn.bits & 0x801f) == 0x2)
 862         {
 863           #include "insns/c_move.h"
 864           break;
 865         }
 866         if((insn.bits & 0x801f) == 0x8002)
 867         {
 868           #include "insns/c_j.h"
 869           break;
 870         }
 871         throw trap_illegal_instruction;
 872       }
 873       case 0x6:
 874       {
 875         if((insn.bits & 0x801f) == 0x2)
 876         {
 877           #include "insns/c_move.h"
 878           break;
 879         }
 880         if((insn.bits & 0x801f) == 0x8002)
 881         {
 882           #include "insns/c_j.h"
 883           break;
 884         }
 885         throw trap_illegal_instruction;
 886       }
 887       case 0x7:
 888       {
 889         if((insn.bits & 0x801f) == 0x2)
 890         {
 891           #include "insns/c_move.h"
 892           break;
 893         }
 894         if((insn.bits & 0x801f) == 0x8002)
 895         {
 896           #include "insns/c_j.h"
 897           break;
 898         }
 899         throw trap_illegal_instruction;
 900       }
 901       default:
 902       {
 903         throw trap_illegal_instruction;
 904       }
 905     }
 906     break;
 907   }
 908   case 0x23:
 909   {
 910     switch((insn.bits >> 0x7) & 0x7)
 911     {
 912       case 0x0:
 913       {
 914         #include "insns/sb.h"
 915         break;
 916       }
 917       case 0x1:
 918       {
 919         #include "insns/sh.h"
 920         break;
 921       }
 922       case 0x2:
 923       {
 924         #include "insns/sw.h"
 925         break;
 926       }
 927       case 0x3:
 928       {
 929         #include "insns/sd.h"
 930         break;
 931       }
 932       default:
 933       {
 934         throw trap_illegal_instruction;
 935       }
 936     }
 937     break;
 938   }
 939   case 0x24:
 940   {
 941     #include "insns/c_ldsp.h"
 942     break;
 943   }
 944   case 0x25:
 945   {
 946     #include "insns/c_lwsp.h"
 947     break;
 948   }
 949   case 0x26:
 950   {
 951     #include "insns/c_sdsp.h"
 952     break;
 953   }
 954   case 0x27:
 955   {
 956     switch((insn.bits >> 0x7) & 0x7)
 957     {
 958       case 0x2:
 959       {
 960         #include "insns/fsw.h"
 961         break;
 962       }
 963       case 0x3:
 964       {
 965         #include "insns/fsd.h"
 966         break;
 967       }
 968       default:
 969       {
 970         throw trap_illegal_instruction;
 971       }
 972     }
 973     break;
 974   }
 975   case 0x28:
 976   {
 977     #include "insns/c_swsp.h"
 978     break;
 979   }
 980   case 0x29:
 981   {
 982     #include "insns/c_ld.h"
 983     break;
 984   }
 985   case 0x2a:
 986   {
 987     #include "insns/c_lw.h"
 988     break;
 989   }
 990   case 0x2b:
 991   {
 992     switch((insn.bits >> 0x7) & 0x7)
 993     {
 994       case 0x2:
 995       {
 996         if((insn.bits & 0x1ffff) == 0x192b)
 997         {
 998           #include "insns/amominu_w.h"
 999           break;
1000         }
1001         if((insn.bits & 0x1ffff) == 0x92b)
1002         {
1003           #include "insns/amoand_w.h"
1004           break;
1005         }
1006         if((insn.bits & 0x1ffff) == 0x1d2b)
1007         {
1008           #include "insns/amomaxu_w.h"
1009           break;
1010         }
1011         if((insn.bits & 0x1ffff) == 0x152b)
1012         {
1013           #include "insns/amomax_w.h"
1014           break;
1015         }
1016         if((insn.bits & 0x1ffff) == 0x12b)
1017         {
1018           #include "insns/amoadd_w.h"
1019           break;
1020         }
1021         if((insn.bits & 0x1ffff) == 0xd2b)
1022         {
1023           #include "insns/amoor_w.h"
1024           break;
1025         }
1026         if((insn.bits & 0x1ffff) == 0x112b)
1027         {
1028           #include "insns/amomin_w.h"
1029           break;
1030         }
1031         if((insn.bits & 0x1ffff) == 0x52b)
1032         {
1033           #include "insns/amoswap_w.h"
1034           break;
1035         }
1036         throw trap_illegal_instruction;
1037       }
1038       case 0x3:
1039       {
1040         if((insn.bits & 0x1ffff) == 0x19ab)
1041         {
1042           #include "insns/amominu_d.h"
1043           break;
1044         }
1045         if((insn.bits & 0x1ffff) == 0x9ab)
1046         {
1047           #include "insns/amoand_d.h"
1048           break;
1049         }
1050         if((insn.bits & 0x1ffff) == 0x1dab)
1051         {
1052           #include "insns/amomaxu_d.h"
1053           break;
1054         }
1055         if((insn.bits & 0x1ffff) == 0x1ab)
1056         {
1057           #include "insns/amoadd_d.h"
1058           break;
1059         }
1060         if((insn.bits & 0x1ffff) == 0x15ab)
1061         {
1062           #include "insns/amomax_d.h"
1063           break;
1064         }
1065         if((insn.bits & 0x1ffff) == 0xdab)
1066         {
1067           #include "insns/amoor_d.h"
1068           break;
1069         }
1070         if((insn.bits & 0x1ffff) == 0x5ab)
1071         {
1072           #include "insns/amoswap_d.h"
1073           break;
1074         }
1075         if((insn.bits & 0x1ffff) == 0x11ab)
1076         {
1077           #include "insns/amomin_d.h"
1078           break;
1079         }
1080         throw trap_illegal_instruction;
1081       }
1082       default:
1083       {
1084         throw trap_illegal_instruction;
1085       }
1086     }
1087     break;
1088   }
1089   case 0x2c:
1090   {
1091     #include "insns/c_sd.h"
1092     break;
1093   }
1094   case 0x2d:
1095   {
1096     #include "insns/c_sw.h"
1097     break;
1098   }
1099   case 0x2f:
1100   {
1101     switch((insn.bits >> 0x7) & 0x7)
1102     {
1103       case 0x1:
1104       {
1105         #include "insns/fence_i.h"
1106         break;
1107       }
1108       case 0x2:
1109       {
1110         #include "insns/fence.h"
1111         break;
1112       }
1113       case 0x4:
1114       {
1115         #include "insns/fence_l_v.h"
1116         break;
1117       }
1118       case 0x5:
1119       {
1120         #include "insns/fence_g_v.h"
1121         break;
1122       }
1123       case 0x6:
1124       {
1125         #include "insns/fence_l_cv.h"
1126         break;
1127       }
1128       case 0x7:
1129       {
1130         #include "insns/fence_g_cv.h"
1131         break;
1132       }
1133       default:
1134       {
1135         throw trap_illegal_instruction;
1136       }
1137     }
1138     break;
1139   }
1140   case 0x30:
1141   {
1142     #include "insns/c_beq.h"
1143     break;
1144   }
1145   case 0x31:
1146   {
1147     #include "insns/c_bne.h"
1148     break;
1149   }
1150   case 0x33:
1151   {
1152     switch((insn.bits >> 0x7) & 0x7)
1153     {
1154       case 0x0:
1155       {
1156         if((insn.bits & 0x1ffff) == 0x33)
1157         {
1158           #include "insns/add.h"
1159           break;
1160         }
1161         if((insn.bits & 0x1ffff) == 0x433)
1162         {
1163           #include "insns/mul.h"
1164           break;
1165         }
1166         if((insn.bits & 0x1ffff) == 0x10033)
1167         {
1168           #include "insns/sub.h"
1169           break;
1170         }
1171         throw trap_illegal_instruction;
1172       }
1173       case 0x1:
1174       {
1175         if((insn.bits & 0x1ffff) == 0xb3)
1176         {
1177           #include "insns/sll.h"
1178           break;
1179         }
1180         if((insn.bits & 0x1ffff) == 0x4b3)
1181         {
1182           #include "insns/mulh.h"
1183           break;
1184         }
1185         throw trap_illegal_instruction;
1186       }
1187       case 0x2:
1188       {
1189         if((insn.bits & 0x1ffff) == 0x533)
1190         {
1191           #include "insns/mulhsu.h"
1192           break;
1193         }
1194         if((insn.bits & 0x1ffff) == 0x133)
1195         {
1196           #include "insns/slt.h"
1197           break;
1198         }
1199         throw trap_illegal_instruction;
1200       }
1201       case 0x3:
1202       {
1203         if((insn.bits & 0x1ffff) == 0x1b3)
1204         {
1205           #include "insns/sltu.h"
1206           break;
1207         }
1208         if((insn.bits & 0x1ffff) == 0x5b3)
1209         {
1210           #include "insns/mulhu.h"
1211           break;
1212         }
1213         throw trap_illegal_instruction;
1214       }
1215       case 0x4:
1216       {
1217         if((insn.bits & 0x1ffff) == 0x633)
1218         {
1219           #include "insns/div.h"
1220           break;
1221         }
1222         if((insn.bits & 0x1ffff) == 0x233)
1223         {
1224           #include "insns/xor.h"
1225           break;
1226         }
1227         throw trap_illegal_instruction;
1228       }
1229       case 0x5:
1230       {
1231         if((insn.bits & 0x1ffff) == 0x102b3)
1232         {
1233           #include "insns/sra.h"
1234           break;
1235         }
1236         if((insn.bits & 0x1ffff) == 0x2b3)
1237         {
1238           #include "insns/srl.h"
1239           break;
1240         }
1241         if((insn.bits & 0x1ffff) == 0x6b3)
1242         {
1243           #include "insns/divu.h"
1244           break;
1245         }
1246         throw trap_illegal_instruction;
1247       }
1248       case 0x6:
1249       {
1250         if((insn.bits & 0x1ffff) == 0x733)
1251         {
1252           #include "insns/rem.h"
1253           break;
1254         }
1255         if((insn.bits & 0x1ffff) == 0x333)
1256         {
1257           #include "insns/or.h"
1258           break;
1259         }
1260         throw trap_illegal_instruction;
1261       }
1262       case 0x7:
1263       {
1264         if((insn.bits & 0x1ffff) == 0x7b3)
1265         {
1266           #include "insns/remu.h"
1267           break;
1268         }
1269         if((insn.bits & 0x1ffff) == 0x3b3)
1270         {
1271           #include "insns/and.h"
1272           break;
1273         }
1274         throw trap_illegal_instruction;
1275       }
1276       default:
1277       {
1278         throw trap_illegal_instruction;
1279       }
1280     }
1281     break;
1282   }
1283   case 0x37:
1284   {
1285     #include "insns/lui.h"
1286     break;
1287   }
1288   case 0x3b:
1289   {
1290     switch((insn.bits >> 0x7) & 0x7)
1291     {
1292       case 0x0:
1293       {
1294         if((insn.bits & 0x1ffff) == 0x43b)
1295         {
1296           #include "insns/mulw.h"
1297           break;
1298         }
1299         if((insn.bits & 0x1ffff) == 0x3b)
1300         {
1301           #include "insns/addw.h"
1302           break;
1303         }
1304         if((insn.bits & 0x1ffff) == 0x1003b)
1305         {
1306           #include "insns/subw.h"
1307           break;
1308         }
1309         throw trap_illegal_instruction;
1310       }
1311       case 0x1:
1312       {
1313         if((insn.bits & 0x1ffff) == 0xbb)
1314         {
1315           #include "insns/sllw.h"
1316           break;
1317         }
1318         throw trap_illegal_instruction;
1319       }
1320       case 0x4:
1321       {
1322         if((insn.bits & 0x1ffff) == 0x63b)
1323         {
1324           #include "insns/divw.h"
1325           break;
1326         }
1327         throw trap_illegal_instruction;
1328       }
1329       case 0x5:
1330       {
1331         if((insn.bits & 0x1ffff) == 0x6bb)
1332         {
1333           #include "insns/divuw.h"
1334           break;
1335         }
1336         if((insn.bits & 0x1ffff) == 0x2bb)
1337         {
1338           #include "insns/srlw.h"
1339           break;
1340         }
1341         if((insn.bits & 0x1ffff) == 0x102bb)
1342         {
1343           #include "insns/sraw.h"
1344           break;
1345         }
1346         throw trap_illegal_instruction;
1347       }
1348       case 0x6:
1349       {
1350         if((insn.bits & 0x1ffff) == 0x73b)
1351         {
1352           #include "insns/remw.h"
1353           break;
1354         }
1355         throw trap_illegal_instruction;
1356       }
1357       case 0x7:
1358       {
1359         if((insn.bits & 0x1ffff) == 0x7bb)
1360         {
1361           #include "insns/remuw.h"
1362           break;
1363         }
1364         throw trap_illegal_instruction;
1365       }
1366       default:
1367       {
1368         throw trap_illegal_instruction;
1369       }
1370     }
1371     break;
1372   }
1373   case 0x40:
1374   {
1375     #include "insns/c_addi.h"
1376     break;
1377   }
1378   case 0x41:
1379   {
1380     #include "insns/c_li.h"
1381     break;
1382   }
1383   case 0x42:
1384   {
1385     switch((insn.bits >> 0x7) & 0x7)
1386     {
1387       case 0x0:
1388       {
1389         if((insn.bits & 0x801f) == 0x2)
1390         {
1391           #include "insns/c_move.h"
1392           break;
1393         }
1394         if((insn.bits & 0x801f) == 0x8002)
1395         {
1396           #include "insns/c_j.h"
1397           break;
1398         }
1399         throw trap_illegal_instruction;
1400       }
1401       case 0x1:
1402       {
1403         if((insn.bits & 0x801f) == 0x2)
1404         {
1405           #include "insns/c_move.h"
1406           break;
1407         }
1408         if((insn.bits & 0x801f) == 0x8002)
1409         {
1410           #include "insns/c_j.h"
1411           break;
1412         }
1413         throw trap_illegal_instruction;
1414       }
1415       case 0x2:
1416       {
1417         if((insn.bits & 0x801f) == 0x2)
1418         {
1419           #include "insns/c_move.h"
1420           break;
1421         }
1422         if((insn.bits & 0x801f) == 0x8002)
1423         {
1424           #include "insns/c_j.h"
1425           break;
1426         }
1427         throw trap_illegal_instruction;
1428       }
1429       case 0x3:
1430       {
1431         if((insn.bits & 0x801f) == 0x2)
1432         {
1433           #include "insns/c_move.h"
1434           break;
1435         }
1436         if((insn.bits & 0x801f) == 0x8002)
1437         {
1438           #include "insns/c_j.h"
1439           break;
1440         }
1441         throw trap_illegal_instruction;
1442       }
1443       case 0x4:
1444       {
1445         if((insn.bits & 0x801f) == 0x2)
1446         {
1447           #include "insns/c_move.h"
1448           break;
1449         }
1450         if((insn.bits & 0x801f) == 0x8002)
1451         {
1452           #include "insns/c_j.h"
1453           break;
1454         }
1455         throw trap_illegal_instruction;
1456       }
1457       case 0x5:
1458       {
1459         if((insn.bits & 0x801f) == 0x2)
1460         {
1461           #include "insns/c_move.h"
1462           break;
1463         }
1464         if((insn.bits & 0x801f) == 0x8002)
1465         {
1466           #include "insns/c_j.h"
1467           break;
1468         }
1469         throw trap_illegal_instruction;
1470       }
1471       case 0x6:
1472       {
1473         if((insn.bits & 0x801f) == 0x2)
1474         {
1475           #include "insns/c_move.h"
1476           break;
1477         }
1478         if((insn.bits & 0x801f) == 0x8002)
1479         {
1480           #include "insns/c_j.h"
1481           break;
1482         }
1483         throw trap_illegal_instruction;
1484       }
1485       case 0x7:
1486       {
1487         if((insn.bits & 0x801f) == 0x2)
1488         {
1489           #include "insns/c_move.h"
1490           break;
1491         }
1492         if((insn.bits & 0x801f) == 0x8002)
1493         {
1494           #include "insns/c_j.h"
1495           break;
1496         }
1497         throw trap_illegal_instruction;
1498       }
1499       default:
1500       {
1501         throw trap_illegal_instruction;
1502       }
1503     }
1504     break;
1505   }
1506   case 0x43:
1507   {
1508     switch((insn.bits >> 0x7) & 0x7)
1509     {
1510       case 0x0:
1511       {
1512         #include "insns/fmadd_s.h"
1513         break;
1514       }
1515       case 0x1:
1516       {
1517         #include "insns/fmadd_d.h"
1518         break;
1519       }
1520       case 0x4:
1521       {
1522         #include "insns/fmadd_s.h"
1523         break;
1524       }
1525       case 0x5:
1526       {
1527         #include "insns/fmadd_d.h"
1528         break;
1529       }
1530       default:
1531       {
1532         throw trap_illegal_instruction;
1533       }
1534     }
1535     break;
1536   }
1537   case 0x44:
1538   {
1539     #include "insns/c_ldsp.h"
1540     break;
1541   }
1542   case 0x45:
1543   {
1544     #include "insns/c_lwsp.h"
1545     break;
1546   }
1547   case 0x46:
1548   {
1549     #include "insns/c_sdsp.h"
1550     break;
1551   }
1552   case 0x47:
1553   {
1554     switch((insn.bits >> 0x7) & 0x7)
1555     {
1556       case 0x0:
1557       {
1558         #include "insns/fmsub_s.h"
1559         break;
1560       }
1561       case 0x1:
1562       {
1563         #include "insns/fmsub_d.h"
1564         break;
1565       }
1566       case 0x4:
1567       {
1568         #include "insns/fmsub_s.h"
1569         break;
1570       }
1571       case 0x5:
1572       {
1573         #include "insns/fmsub_d.h"
1574         break;
1575       }
1576       default:
1577       {
1578         throw trap_illegal_instruction;
1579       }
1580     }
1581     break;
1582   }
1583   case 0x48:
1584   {
1585     #include "insns/c_swsp.h"
1586     break;
1587   }
1588   case 0x49:
1589   {
1590     #include "insns/c_ld.h"
1591     break;
1592   }
1593   case 0x4a:
1594   {
1595     #include "insns/c_lw.h"
1596     break;
1597   }
1598   case 0x4b:
1599   {
1600     switch((insn.bits >> 0x7) & 0x7)
1601     {
1602       case 0x0:
1603       {
1604         #include "insns/fnmsub_s.h"
1605         break;
1606       }
1607       case 0x1:
1608       {
1609         #include "insns/fnmsub_d.h"
1610         break;
1611       }
1612       case 0x4:
1613       {
1614         #include "insns/fnmsub_s.h"
1615         break;
1616       }
1617       case 0x5:
1618       {
1619         #include "insns/fnmsub_d.h"
1620         break;
1621       }
1622       default:
1623       {
1624         throw trap_illegal_instruction;
1625       }
1626     }
1627     break;
1628   }
1629   case 0x4c:
1630   {
1631     #include "insns/c_sd.h"
1632     break;
1633   }
1634   case 0x4d:
1635   {
1636     #include "insns/c_sw.h"
1637     break;
1638   }
1639   case 0x4f:
1640   {
1641     switch((insn.bits >> 0x7) & 0x7)
1642     {
1643       case 0x0:
1644       {
1645         #include "insns/fnmadd_s.h"
1646         break;
1647       }
1648       case 0x1:
1649       {
1650         #include "insns/fnmadd_d.h"
1651         break;
1652       }
1653       case 0x4:
1654       {
1655         #include "insns/fnmadd_s.h"
1656         break;
1657       }
1658       case 0x5:
1659       {
1660         #include "insns/fnmadd_d.h"
1661         break;
1662       }
1663       default:
1664       {
1665         throw trap_illegal_instruction;
1666       }
1667     }
1668     break;
1669   }
1670   case 0x50:
1671   {
1672     #include "insns/c_beq.h"
1673     break;
1674   }
1675   case 0x51:
1676   {
1677     #include "insns/c_bne.h"
1678     break;
1679   }
1680   case 0x53:
1681   {
1682     switch((insn.bits >> 0x7) & 0x7)
1683     {
1684       case 0x0:
1685       {
1686         if((insn.bits & 0x3ff1ff) == 0x9053)
1687         {
1688           #include "insns/fcvt_lu_s.h"
1689           break;
1690         }
1691         if((insn.bits & 0x1ffff) == 0x18053)
1692         {
1693           #include "insns/fmin_s.h"
1694           break;
1695         }
1696         if((insn.bits & 0x3ff1ff) == 0x11053)
1697         {
1698           #include "insns/fcvt_s_d.h"
1699           break;
1700         }
1701         if((insn.bits & 0x3ff1ff) == 0xe053)
1702         {
1703           #include "insns/fcvt_s_w.h"
1704           break;
1705         }
1706         if((insn.bits & 0x7c1ffff) == 0x1c053)
1707         {
1708           #include "insns/mftx_s.h"
1709           break;
1710         }
1711         if((insn.bits & 0x3ff1ff) == 0x8053)
1712         {
1713           #include "insns/fcvt_l_s.h"
1714           break;
1715         }
1716         if((insn.bits & 0x1ffff) == 0x17053)
1717         {
1718           #include "insns/fle_s.h"
1719           break;
1720         }
1721         if((insn.bits & 0x7ffffff) == 0x1d053)
1722         {
1723           #include "insns/mffsr.h"
1724           break;
1725         }
1726         if((insn.bits & 0x1f1ff) == 0x3053)
1727         {
1728           #include "insns/fdiv_s.h"
1729           break;
1730         }
1731         if((insn.bits & 0x3fffff) == 0x1f053)
1732         {
1733           #include "insns/mtfsr.h"
1734           break;
1735         }
1736         if((insn.bits & 0x3ff1ff) == 0xd053)
1737         {
1738           #include "insns/fcvt_s_lu.h"
1739           break;
1740         }
1741         if((insn.bits & 0x1f1ff) == 0x2053)
1742         {
1743           #include "insns/fmul_s.h"
1744           break;
1745         }
1746         if((insn.bits & 0x1ffff) == 0x16053)
1747         {
1748           #include "insns/flt_s.h"
1749           break;
1750         }
1751         if((insn.bits & 0x1ffff) == 0x15053)
1752         {
1753           #include "insns/feq_s.h"
1754           break;
1755         }
1756         if((insn.bits & 0x1ffff) == 0x7053)
1757         {
1758           #include "insns/fsgnjx_s.h"
1759           break;
1760         }
1761         if((insn.bits & 0x1ffff) == 0x19053)
1762         {
1763           #include "insns/fmax_s.h"
1764           break;
1765         }
1766         if((insn.bits & 0x3ff1ff) == 0xb053)
1767         {
1768           #include "insns/fcvt_wu_s.h"
1769           break;
1770         }
1771         if((insn.bits & 0x3ff1ff) == 0xa053)
1772         {
1773           #include "insns/fcvt_w_s.h"
1774           break;
1775         }
1776         if((insn.bits & 0x3fffff) == 0x1e053)
1777         {
1778           #include "insns/mxtf_s.h"
1779           break;
1780         }
1781         if((insn.bits & 0x1f1ff) == 0x1053)
1782         {
1783           #include "insns/fsub_s.h"
1784           break;
1785         }
1786         if((insn.bits & 0x1ffff) == 0x5053)
1787         {
1788           #include "insns/fsgnj_s.h"
1789           break;
1790         }
1791         if((insn.bits & 0x3ff1ff) == 0xf053)
1792         {
1793           #include "insns/fcvt_s_wu.h"
1794           break;
1795         }
1796         if((insn.bits & 0x3ff1ff) == 0xc053)
1797         {
1798           #include "insns/fcvt_s_l.h"
1799           break;
1800         }
1801         if((insn.bits & 0x3ff1ff) == 0x4053)
1802         {
1803           #include "insns/fsqrt_s.h"
1804           break;
1805         }
1806         if((insn.bits & 0x1ffff) == 0x6053)
1807         {
1808           #include "insns/fsgnjn_s.h"
1809           break;
1810         }
1811         if((insn.bits & 0x1f1ff) == 0x53)
1812         {
1813           #include "insns/fadd_s.h"
1814           break;
1815         }
1816         throw trap_illegal_instruction;
1817       }
1818       case 0x1:
1819       {
1820         if((insn.bits & 0x1ffff) == 0x180d3)
1821         {
1822           #include "insns/fmin_d.h"
1823           break;
1824         }
1825         if((insn.bits & 0x3ff1ff) == 0xc0d3)
1826         {
1827           #include "insns/fcvt_d_l.h"
1828           break;
1829         }
1830         if((insn.bits & 0x3fffff) == 0xe0d3)
1831         {
1832           #include "insns/fcvt_d_w.h"
1833           break;
1834         }
1835         if((insn.bits & 0x3fffff) == 0x100d3)
1836         {
1837           #include "insns/fcvt_d_s.h"
1838           break;
1839         }
1840         if((insn.bits & 0x1ffff) == 0x190d3)
1841         {
1842           #include "insns/fmax_d.h"
1843           break;
1844         }
1845         if((insn.bits & 0x7c1ffff) == 0x1c0d3)
1846         {
1847           #include "insns/mftx_d.h"
1848           break;
1849         }
1850         if((insn.bits & 0x1ffff) == 0x170d3)
1851         {
1852           #include "insns/fle_d.h"
1853           break;
1854         }
1855         if((insn.bits & 0x1ffff) == 0x160d3)
1856         {
1857           #include "insns/flt_d.h"
1858           break;
1859         }
1860         if((insn.bits & 0x1f1ff) == 0x20d3)
1861         {
1862           #include "insns/fmul_d.h"
1863           break;
1864         }
1865         if((insn.bits & 0x1ffff) == 0x70d3)
1866         {
1867           #include "insns/fsgnjx_d.h"
1868           break;
1869         }
1870         if((insn.bits & 0x1ffff) == 0x150d3)
1871         {
1872           #include "insns/feq_d.h"
1873           break;
1874         }
1875         if((insn.bits & 0x3fffff) == 0xf0d3)
1876         {
1877           #include "insns/fcvt_d_wu.h"
1878           break;
1879         }
1880         if((insn.bits & 0x3ff1ff) == 0xb0d3)
1881         {
1882           #include "insns/fcvt_wu_d.h"
1883           break;
1884         }
1885         if((insn.bits & 0x1ffff) == 0x60d3)
1886         {
1887           #include "insns/fsgnjn_d.h"
1888           break;
1889         }
1890         if((insn.bits & 0x3ff1ff) == 0xd0d3)
1891         {
1892           #include "insns/fcvt_d_lu.h"
1893           break;
1894         }
1895         if((insn.bits & 0x3ff1ff) == 0xa0d3)
1896         {
1897           #include "insns/fcvt_w_d.h"
1898           break;
1899         }
1900         if((insn.bits & 0x3fffff) == 0x1e0d3)
1901         {
1902           #include "insns/mxtf_d.h"
1903           break;
1904         }
1905         if((insn.bits & 0x1ffff) == 0x50d3)
1906         {
1907           #include "insns/fsgnj_d.h"
1908           break;
1909         }
1910         if((insn.bits & 0x3ff1ff) == 0x80d3)
1911         {
1912           #include "insns/fcvt_l_d.h"
1913           break;
1914         }
1915         if((insn.bits & 0x1f1ff) == 0xd3)
1916         {
1917           #include "insns/fadd_d.h"
1918           break;
1919         }
1920         if((insn.bits & 0x3ff1ff) == 0x90d3)
1921         {
1922           #include "insns/fcvt_lu_d.h"
1923           break;
1924         }
1925         if((insn.bits & 0x1f1ff) == 0x10d3)
1926         {
1927           #include "insns/fsub_d.h"
1928           break;
1929         }
1930         if((insn.bits & 0x3ff1ff) == 0x40d3)
1931         {
1932           #include "insns/fsqrt_d.h"
1933           break;
1934         }
1935         if((insn.bits & 0x1f1ff) == 0x30d3)
1936         {
1937           #include "insns/fdiv_d.h"
1938           break;
1939         }
1940         throw trap_illegal_instruction;
1941       }
1942       case 0x4:
1943       {
1944         if((insn.bits & 0x3ff1ff) == 0x9053)
1945         {
1946           #include "insns/fcvt_lu_s.h"
1947           break;
1948         }
1949         if((insn.bits & 0x3ff1ff) == 0x11053)
1950         {
1951           #include "insns/fcvt_s_d.h"
1952           break;
1953         }
1954         if((insn.bits & 0x3ff1ff) == 0xe053)
1955         {
1956           #include "insns/fcvt_s_w.h"
1957           break;
1958         }
1959         if((insn.bits & 0x3ff1ff) == 0x8053)
1960         {
1961           #include "insns/fcvt_l_s.h"
1962           break;
1963         }
1964         if((insn.bits & 0x1f1ff) == 0x3053)
1965         {
1966           #include "insns/fdiv_s.h"
1967           break;
1968         }
1969         if((insn.bits & 0x3ff1ff) == 0xd053)
1970         {
1971           #include "insns/fcvt_s_lu.h"
1972           break;
1973         }
1974         if((insn.bits & 0x1f1ff) == 0x2053)
1975         {
1976           #include "insns/fmul_s.h"
1977           break;
1978         }
1979         if((insn.bits & 0x3ff1ff) == 0xb053)
1980         {
1981           #include "insns/fcvt_wu_s.h"
1982           break;
1983         }
1984         if((insn.bits & 0x3ff1ff) == 0xa053)
1985         {
1986           #include "insns/fcvt_w_s.h"
1987           break;
1988         }
1989         if((insn.bits & 0x1f1ff) == 0x1053)
1990         {
1991           #include "insns/fsub_s.h"
1992           break;
1993         }
1994         if((insn.bits & 0x3ff1ff) == 0xf053)
1995         {
1996           #include "insns/fcvt_s_wu.h"
1997           break;
1998         }
1999         if((insn.bits & 0x3ff1ff) == 0xc053)
2000         {
2001           #include "insns/fcvt_s_l.h"
2002           break;
2003         }
2004         if((insn.bits & 0x3ff1ff) == 0x4053)
2005         {
2006           #include "insns/fsqrt_s.h"
2007           break;
2008         }
2009         if((insn.bits & 0x1f1ff) == 0x53)
2010         {
2011           #include "insns/fadd_s.h"
2012           break;
2013         }
2014         throw trap_illegal_instruction;
2015       }
2016       case 0x5:
2017       {
2018         if((insn.bits & 0x3ff1ff) == 0xc0d3)
2019         {
2020           #include "insns/fcvt_d_l.h"
2021           break;
2022         }
2023         if((insn.bits & 0x1f1ff) == 0x20d3)
2024         {
2025           #include "insns/fmul_d.h"
2026           break;
2027         }
2028         if((insn.bits & 0x3ff1ff) == 0xb0d3)
2029         {
2030           #include "insns/fcvt_wu_d.h"
2031           break;
2032         }
2033         if((insn.bits & 0x3ff1ff) == 0xd0d3)
2034         {
2035           #include "insns/fcvt_d_lu.h"
2036           break;
2037         }
2038         if((insn.bits & 0x3ff1ff) == 0xa0d3)
2039         {
2040           #include "insns/fcvt_w_d.h"
2041           break;
2042         }
2043         if((insn.bits & 0x3ff1ff) == 0x80d3)
2044         {
2045           #include "insns/fcvt_l_d.h"
2046           break;
2047         }
2048         if((insn.bits & 0x1f1ff) == 0xd3)
2049         {
2050           #include "insns/fadd_d.h"
2051           break;
2052         }
2053         if((insn.bits & 0x3ff1ff) == 0x90d3)
2054         {
2055           #include "insns/fcvt_lu_d.h"
2056           break;
2057         }
2058         if((insn.bits & 0x1f1ff) == 0x10d3)
2059         {
2060           #include "insns/fsub_d.h"
2061           break;
2062         }
2063         if((insn.bits & 0x3ff1ff) == 0x40d3)
2064         {
2065           #include "insns/fsqrt_d.h"
2066           break;
2067         }
2068         if((insn.bits & 0x1f1ff) == 0x30d3)
2069         {
2070           #include "insns/fdiv_d.h"
2071           break;
2072         }
2073         throw trap_illegal_instruction;
2074       }
2075       default:
2076       {
2077         throw trap_illegal_instruction;
2078       }
2079     }
2080     break;
2081   }
2082   case 0x60:
2083   {
2084     #include "insns/c_addi.h"
2085     break;
2086   }
2087   case 0x61:
2088   {
2089     #include "insns/c_li.h"
2090     break;
2091   }
2092   case 0x62:
2093   {
2094     switch((insn.bits >> 0x7) & 0x7)
2095     {
2096       case 0x0:
2097       {
2098         if((insn.bits & 0x801f) == 0x2)
2099         {
2100           #include "insns/c_move.h"
2101           break;
2102         }
2103         if((insn.bits & 0x801f) == 0x8002)
2104         {
2105           #include "insns/c_j.h"
2106           break;
2107         }
2108         throw trap_illegal_instruction;
2109       }
2110       case 0x1:
2111       {
2112         if((insn.bits & 0x801f) == 0x2)
2113         {
2114           #include "insns/c_move.h"
2115           break;
2116         }
2117         if((insn.bits & 0x801f) == 0x8002)
2118         {
2119           #include "insns/c_j.h"
2120           break;
2121         }
2122         throw trap_illegal_instruction;
2123       }
2124       case 0x2:
2125       {
2126         if((insn.bits & 0x801f) == 0x2)
2127         {
2128           #include "insns/c_move.h"
2129           break;
2130         }
2131         if((insn.bits & 0x801f) == 0x8002)
2132         {
2133           #include "insns/c_j.h"
2134           break;
2135         }
2136         throw trap_illegal_instruction;
2137       }
2138       case 0x3:
2139       {
2140         if((insn.bits & 0x801f) == 0x2)
2141         {
2142           #include "insns/c_move.h"
2143           break;
2144         }
2145         if((insn.bits & 0x801f) == 0x8002)
2146         {
2147           #include "insns/c_j.h"
2148           break;
2149         }
2150         throw trap_illegal_instruction;
2151       }
2152       case 0x4:
2153       {
2154         if((insn.bits & 0x801f) == 0x2)
2155         {
2156           #include "insns/c_move.h"
2157           break;
2158         }
2159         if((insn.bits & 0x801f) == 0x8002)
2160         {
2161           #include "insns/c_j.h"
2162           break;
2163         }
2164         throw trap_illegal_instruction;
2165       }
2166       case 0x5:
2167       {
2168         if((insn.bits & 0x801f) == 0x2)
2169         {
2170           #include "insns/c_move.h"
2171           break;
2172         }
2173         if((insn.bits & 0x801f) == 0x8002)
2174         {
2175           #include "insns/c_j.h"
2176           break;
2177         }
2178         throw trap_illegal_instruction;
2179       }
2180       case 0x6:
2181       {
2182         if((insn.bits & 0x801f) == 0x2)
2183         {
2184           #include "insns/c_move.h"
2185           break;
2186         }
2187         if((insn.bits & 0x801f) == 0x8002)
2188         {
2189           #include "insns/c_j.h"
2190           break;
2191         }
2192         throw trap_illegal_instruction;
2193       }
2194       case 0x7:
2195       {
2196         if((insn.bits & 0x801f) == 0x2)
2197         {
2198           #include "insns/c_move.h"
2199           break;
2200         }
2201         if((insn.bits & 0x801f) == 0x8002)
2202         {
2203           #include "insns/c_j.h"
2204           break;
2205         }
2206         throw trap_illegal_instruction;
2207       }
2208       default:
2209       {
2210         throw trap_illegal_instruction;
2211       }
2212     }
2213     break;
2214   }
2215   case 0x63:
2216   {
2217     switch((insn.bits >> 0x7) & 0x7)
2218     {
2219       case 0x0:
2220       {
2221         #include "insns/beq.h"
2222         break;
2223       }
2224       case 0x1:
2225       {
2226         #include "insns/bne.h"
2227         break;
2228       }
2229       case 0x4:
2230       {
2231         #include "insns/blt.h"
2232         break;
2233       }
2234       case 0x5:
2235       {
2236         #include "insns/bge.h"
2237         break;
2238       }
2239       case 0x6:
2240       {
2241         #include "insns/bltu.h"
2242         break;
2243       }
2244       case 0x7:
2245       {
2246         #include "insns/bgeu.h"
2247         break;
2248       }
2249       default:
2250       {
2251         throw trap_illegal_instruction;
2252       }
2253     }
2254     break;
2255   }
2256   case 0x64:
2257   {
2258     #include "insns/c_ldsp.h"
2259     break;
2260   }
2261   case 0x65:
2262   {
2263     #include "insns/c_lwsp.h"
2264     break;
2265   }
2266   case 0x66:
2267   {
2268     #include "insns/c_sdsp.h"
2269     break;
2270   }
2271   case 0x67:
2272   {
2273     #include "insns/j.h"
2274     break;
2275   }
2276   case 0x68:
2277   {
2278     #include "insns/c_swsp.h"
2279     break;
2280   }
2281   case 0x69:
2282   {
2283     #include "insns/c_ld.h"
2284     break;
2285   }
2286   case 0x6a:
2287   {
2288     #include "insns/c_lw.h"
2289     break;
2290   }
2291   case 0x6b:
2292   {
2293     switch((insn.bits >> 0x7) & 0x7)
2294     {
2295       case 0x0:
2296       {
2297         #include "insns/jalr_c.h"
2298         break;
2299       }
2300       case 0x1:
2301       {
2302         #include "insns/jalr_r.h"
2303         break;
2304       }
2305       case 0x2:
2306       {
2307         #include "insns/jalr_j.h"
2308         break;
2309       }
2310       case 0x4:
2311       {
2312         if((insn.bits & 0x7ffffff) == 0x26b)
2313         {
2314           #include "insns/rdnpc.h"
2315           break;
2316         }
2317         throw trap_illegal_instruction;
2318       }
2319       default:
2320       {
2321         throw trap_illegal_instruction;
2322       }
2323     }
2324     break;
2325   }
2326   case 0x6c:
2327   {
2328     #include "insns/c_sd.h"
2329     break;
2330   }
2331   case 0x6d:
2332   {
2333     #include "insns/c_sw.h"
2334     break;
2335   }
2336   case 0x6f:
2337   {
2338     #include "insns/jal.h"
2339     break;
2340   }
2341   case 0x70:
2342   {
2343     #include "insns/c_beq.h"
2344     break;
2345   }
2346   case 0x71:
2347   {
2348     #include "insns/c_bne.h"
2349     break;
2350   }
2351   case 0x73:
2352   {
2353     switch((insn.bits >> 0x7) & 0x7)
2354     {
2355       case 0x0:
2356       {
2357         #include "insns/vcfgivl.h"
2358         break;
2359       }
2360       case 0x1:
2361       {
2362         if((insn.bits & 0x3fffff) == 0xf3)
2363         {
2364           #include "insns/setvl.h"
2365           break;
2366         }
2367         throw trap_illegal_instruction;
2368       }
2369       case 0x2:
2370       {
2371         if((insn.bits & 0xf80003ff) == 0x173)
2372         {
2373           #include "insns/vf.h"
2374           break;
2375         }
2376         throw trap_illegal_instruction;
2377       }
2378       default:
2379       {
2380         throw trap_illegal_instruction;
2381       }
2382     }
2383     break;
2384   }
2385   case 0x77:
2386   {
2387     switch((insn.bits >> 0x7) & 0x7)
2388     {
2389       case 0x0:
2390       {
2391         if((insn.bits & 0xffffffff) == 0x77)
2392         {
2393           #include "insns/syscall.h"
2394           break;
2395         }
2396         throw trap_illegal_instruction;
2397       }
2398       case 0x1:
2399       {
2400         if((insn.bits & 0xffffffff) == 0xf7)
2401         {
2402           #include "insns/break.h"
2403           break;
2404         }
2405         throw trap_illegal_instruction;
2406       }
2407       case 0x2:
2408       {
2409         if((insn.bits & 0xffffffff) == 0x177)
2410         {
2411           #include "insns/stop.h"
2412           break;
2413         }
2414         throw trap_illegal_instruction;
2415       }
2416       case 0x3:
2417       {
2418         if((insn.bits & 0x7ffffff) == 0x1f7)
2419         {
2420           #include "insns/utidx.h"
2421           break;
2422         }
2423         throw trap_illegal_instruction;
2424       }
2425       default:
2426       {
2427         throw trap_illegal_instruction;
2428       }
2429     }
2430     break;
2431   }
2432   case 0x7b:
2433   {
2434     switch((insn.bits >> 0x7) & 0x7)
2435     {
2436       case 0x0:
2437       {
2438         if((insn.bits & 0x7ffffff) == 0x7b)
2439         {
2440           #include "insns/ei.h"
2441           break;
2442         }
2443         throw trap_illegal_instruction;
2444       }
2445       case 0x1:
2446       {
2447         if((insn.bits & 0x7ffffff) == 0xfb)
2448         {
2449           #include "insns/di.h"
2450           break;
2451         }
2452         throw trap_illegal_instruction;
2453       }
2454       case 0x2:
2455       {
2456         if((insn.bits & 0x7c1ffff) == 0x17b)
2457         {
2458           #include "insns/mfpcr.h"
2459           break;
2460         }
2461         throw trap_illegal_instruction;
2462       }
2463       case 0x3:
2464       {
2465         if((insn.bits & 0xf801ffff) == 0x1fb)
2466         {
2467           #include "insns/mtpcr.h"
2468           break;
2469         }
2470         throw trap_illegal_instruction;
2471       }
2472       case 0x4:
2473       {
2474         if((insn.bits & 0xffffffff) == 0x27b)
2475         {
2476           #include "insns/eret.h"
2477           break;
2478         }
2479         throw trap_illegal_instruction;
2480       }
2481       case 0x5:
2482       {
2483         if((insn.bits & 0xffffffff) == 0x2fb)
2484         {
2485           #include "insns/cflush.h"
2486           break;
2487         }
2488         throw trap_illegal_instruction;
2489       }
2490       default:
2491       {
2492         throw trap_illegal_instruction;
2493       }
2494     }
2495     break;
2496   }
2497   default:
2498   {
2499     throw trap_illegal_instruction;
2500   }
2501 }