6 #include <sys/socket.h>
18 #include "gdbserver.h"
21 #define C_EBREAK 0x9002
22 #define EBREAK 0x00100073
24 //////////////////////////////////////// Utility Functions
33 void die(const char* msg
)
35 fprintf(stderr
, "gdbserver code died: %s\n", msg
);
39 // gdb's register list is defined in riscv_gdb_reg_names gdb/riscv-tdep.c in
40 // its source tree. We must interpret the numbers the same here.
52 //////////////////////////////////////// Functions to generate RISC-V opcodes.
54 // TODO: Does this already exist somewhere?
57 // Using regnames.cc as source. The RVG Calling Convention of the 2.0 RISC-V
58 // spec says it should be 2 and 3.
61 static uint32_t bits(uint32_t value
, unsigned int hi
, unsigned int lo
) {
62 return (value
>> lo
) & ((1 << (hi
+1-lo
)) - 1);
65 static uint32_t bit(uint32_t value
, unsigned int b
) {
66 return (value
>> b
) & 1;
69 static uint32_t jal(unsigned int rd
, uint32_t imm
) {
70 return (bit(imm
, 20) << 31) |
71 (bits(imm
, 10, 1) << 21) |
72 (bit(imm
, 11) << 20) |
73 (bits(imm
, 19, 12) << 12) |
78 static uint32_t csrsi(unsigned int csr
, uint16_t imm
) {
80 (bits(imm
, 4, 0) << 15) |
84 static uint32_t csrci(unsigned int csr
, uint16_t imm
) {
86 (bits(imm
, 4, 0) << 15) |
90 static uint32_t csrr(unsigned int rd
, unsigned int csr
) {
91 return (csr
<< 20) | (rd
<< 7) | MATCH_CSRRS
;
94 static uint32_t csrw(unsigned int source
, unsigned int csr
) {
95 return (csr
<< 20) | (source
<< 15) | MATCH_CSRRW
;
98 static uint32_t fence_i()
100 return MATCH_FENCE_I
;
103 static uint32_t sb(unsigned int src
, unsigned int base
, uint16_t offset
)
105 return (bits(offset
, 11, 5) << 25) |
108 (bits(offset
, 4, 0) << 7) |
112 static uint32_t sh(unsigned int src
, unsigned int base
, uint16_t offset
)
114 return (bits(offset
, 11, 5) << 25) |
117 (bits(offset
, 4, 0) << 7) |
121 static uint32_t sw(unsigned int src
, unsigned int base
, uint16_t offset
)
123 return (bits(offset
, 11, 5) << 25) |
126 (bits(offset
, 4, 0) << 7) |
130 static uint32_t sd(unsigned int src
, unsigned int base
, uint16_t offset
)
132 return (bits(offset
, 11, 5) << 25) |
133 (bits(src
, 4, 0) << 20) |
135 (bits(offset
, 4, 0) << 7) |
139 static uint32_t sq(unsigned int src
, unsigned int base
, uint16_t offset
)
142 return (bits(offset
, 11, 5) << 25) |
143 (bits(src
, 4, 0) << 20) |
145 (bits(offset
, 4, 0) << 7) |
152 static uint32_t lq(unsigned int rd
, unsigned int base
, uint16_t offset
)
155 return (bits(offset
, 11, 0) << 20) |
157 (bits(rd
, 4, 0) << 7) |
164 static uint32_t ld(unsigned int rd
, unsigned int base
, uint16_t offset
)
166 return (bits(offset
, 11, 0) << 20) |
168 (bits(rd
, 4, 0) << 7) |
172 static uint32_t lw(unsigned int rd
, unsigned int base
, uint16_t offset
)
174 return (bits(offset
, 11, 0) << 20) |
176 (bits(rd
, 4, 0) << 7) |
180 static uint32_t lh(unsigned int rd
, unsigned int base
, uint16_t offset
)
182 return (bits(offset
, 11, 0) << 20) |
184 (bits(rd
, 4, 0) << 7) |
188 static uint32_t lb(unsigned int rd
, unsigned int base
, uint16_t offset
)
190 return (bits(offset
, 11, 0) << 20) |
192 (bits(rd
, 4, 0) << 7) |
196 static uint32_t fsw(unsigned int src
, unsigned int base
, uint16_t offset
)
198 return (bits(offset
, 11, 5) << 25) |
199 (bits(src
, 4, 0) << 20) |
201 (bits(offset
, 4, 0) << 7) |
205 static uint32_t fsd(unsigned int src
, unsigned int base
, uint16_t offset
)
207 return (bits(offset
, 11, 5) << 25) |
208 (bits(src
, 4, 0) << 20) |
210 (bits(offset
, 4, 0) << 7) |
214 static uint32_t flw(unsigned int src
, unsigned int base
, uint16_t offset
)
216 return (bits(offset
, 11, 5) << 25) |
217 (bits(src
, 4, 0) << 20) |
219 (bits(offset
, 4, 0) << 7) |
223 static uint32_t fld(unsigned int src
, unsigned int base
, uint16_t offset
)
225 return (bits(offset
, 11, 5) << 25) |
226 (bits(src
, 4, 0) << 20) |
228 (bits(offset
, 4, 0) << 7) |
232 static uint32_t addi(unsigned int dest
, unsigned int src
, uint16_t imm
)
234 return (bits(imm
, 11, 0) << 20) |
240 static uint32_t ori(unsigned int dest
, unsigned int src
, uint16_t imm
)
242 return (bits(imm
, 11, 0) << 20) |
248 static uint32_t xori(unsigned int dest
, unsigned int src
, uint16_t imm
)
250 return (bits(imm
, 11, 0) << 20) |
256 static uint32_t srli(unsigned int dest
, unsigned int src
, uint8_t shamt
)
258 return (bits(shamt
, 4, 0) << 20) |
265 static uint32_t nop()
267 return addi(0, 0, 0);
270 template <typename T
>
271 unsigned int circular_buffer_t
<T
>::size() const
276 return end
+ capacity
- start
;
279 template <typename T
>
280 void circular_buffer_t
<T
>::consume(unsigned int bytes
)
282 start
= (start
+ bytes
) % capacity
;
285 template <typename T
>
286 unsigned int circular_buffer_t
<T
>::contiguous_empty_size() const
290 return capacity
- end
- 1;
292 return capacity
- end
;
294 return start
- end
- 1;
297 template <typename T
>
298 unsigned int circular_buffer_t
<T
>::contiguous_data_size() const
303 return capacity
- start
;
306 template <typename T
>
307 void circular_buffer_t
<T
>::data_added(unsigned int bytes
)
310 assert(end
<= capacity
);
315 template <typename T
>
316 void circular_buffer_t
<T
>::reset()
322 template <typename T
>
323 void circular_buffer_t
<T
>::append(const T
*src
, unsigned int count
)
325 unsigned int copy
= std::min(count
, contiguous_empty_size());
326 memcpy(contiguous_empty(), src
, copy
* sizeof(T
));
330 assert(count
< contiguous_empty_size());
331 memcpy(contiguous_empty(), src
, count
* sizeof(T
));
336 ////////////////////////////// Debug Operations
338 class halt_op_t
: public operation_t
341 halt_op_t(gdbserver_t
& gdbserver
, bool send_status
=false) :
342 operation_t(gdbserver
), send_status(send_status
),
345 void write_dpc_program() {
346 gs
.dr_write32(0, csrsi(CSR_DCSR
, DCSR_HALT
));
347 gs
.dr_write32(1, csrr(S0
, CSR_DPC
));
348 gs
.dr_write_store(2, S0
, SLOT_DATA0
);
353 bool perform_step(unsigned int step
) {
355 gs
.tselect_valid
= false;
358 gs
.dr_write32(0, xori(S1
, ZERO
, -1));
359 gs
.dr_write32(1, srli(S1
, S1
, 31));
360 // 0x00000001 0x00000001:ffffffff 0x00000001:ffffffff:ffffffff:ffffffff
361 gs
.dr_write32(2, sw(S1
, ZERO
, DEBUG_RAM_START
));
362 gs
.dr_write32(3, srli(S1
, S1
, 31));
363 // 0x00000000 0x00000000:00000003 0x00000000:00000003:ffffffff:ffffffff
364 gs
.dr_write32(4, sw(S1
, ZERO
, DEBUG_RAM_START
+ 4));
377 uint32_t word0
= gs
.dr_read32(0);
378 uint32_t word1
= gs
.dr_read32(1);
380 if (word0
== 1 && word1
== 0) {
382 } else if (word0
== 0xffffffff && word1
== 3) {
384 } else if (word0
== 0xffffffff && word1
== 0xffffffff) {
394 gs
.dpc
= gs
.dr_read(SLOT_DATA0
);
395 gs
.dr_write32(0, csrr(S0
, CSR_MSTATUS
));
396 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
403 gs
.mstatus
= gs
.dr_read(SLOT_DATA0
);
404 gs
.dr_write32(0, csrr(S0
, CSR_DCSR
));
405 gs
.dr_write32(1, sw(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
412 gs
.dcsr
= gs
.dr_read32(4);
414 gs
.sptbr_valid
= false;
415 gs
.pte_cache
.clear();
418 switch (get_field(gs
.dcsr
, DCSR_CAUSE
)) {
419 case DCSR_CAUSE_NONE
:
420 fprintf(stderr
, "Internal error. Processor halted without reason.\n");
423 case DCSR_CAUSE_DEBUGINT
:
424 gs
.send_packet("S02"); // Pretend program received SIGINT.
427 case DCSR_CAUSE_HWBP
:
428 case DCSR_CAUSE_STEP
:
429 case DCSR_CAUSE_HALT
:
430 // There's no gdb code for this.
431 gs
.send_packet("T05");
433 case DCSR_CAUSE_SWBP
:
434 gs
.send_packet("T05swbreak:;");
456 class continue_op_t
: public operation_t
459 continue_op_t(gdbserver_t
& gdbserver
, bool single_step
) :
460 operation_t(gdbserver
), single_step(single_step
) {};
462 bool perform_step(unsigned int step
) {
463 D(fprintf(stderr
, "continue step %d\n", step
));
466 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
467 gs
.dr_write32(1, csrw(S0
, CSR_DPC
));
468 // TODO: Isn't there a fence.i in Debug ROM already?
469 if (gs
.fence_i_required
) {
470 gs
.dr_write32(2, fence_i());
472 gs
.fence_i_required
= false;
476 gs
.dr_write(SLOT_DATA0
, gs
.dpc
);
481 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
482 gs
.dr_write32(1, csrw(S0
, CSR_MSTATUS
));
484 gs
.dr_write(SLOT_DATA0
, gs
.mstatus
);
489 gs
.dr_write32(0, lw(S0
, 0, (uint16_t) DEBUG_RAM_START
+16));
490 gs
.dr_write32(1, csrw(S0
, CSR_DCSR
));
493 reg_t dcsr
= set_field(gs
.dcsr
, DCSR_HALT
, 0);
494 dcsr
= set_field(dcsr
, DCSR_STEP
, single_step
);
495 // Software breakpoints should go here.
496 dcsr
= set_field(dcsr
, DCSR_EBREAKM
, 1);
497 dcsr
= set_field(dcsr
, DCSR_EBREAKH
, 1);
498 dcsr
= set_field(dcsr
, DCSR_EBREAKS
, 1);
499 dcsr
= set_field(dcsr
, DCSR_EBREAKU
, 1);
500 gs
.dr_write32(4, dcsr
);
512 class general_registers_read_op_t
: public operation_t
514 // Register order that gdb expects is:
515 // "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
516 // "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
517 // "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
518 // "x24", "x25", "x26", "x27", "x28", "x29", "x30", "x31",
520 // Each byte of register data is described by two hex digits. The bytes with
521 // the register are transmitted in target byte order. The size of each
522 // register and their position within the ‘g’ packet are determined by the
523 // gdb internal gdbarch functions DEPRECATED_REGISTER_RAW_SIZE and
524 // gdbarch_register_name.
527 general_registers_read_op_t(gdbserver_t
& gdbserver
) :
528 operation_t(gdbserver
) {};
530 bool perform_step(unsigned int step
)
532 D(fprintf(stderr
, "register_read step %d\n", step
));
536 // x0 is always zero.
538 gs
.send((uint32_t) 0);
540 gs
.send((uint64_t) 0);
543 gs
.dr_write_store(0, 1, SLOT_DATA0
);
544 gs
.dr_write_store(1, 2, SLOT_DATA1
);
551 gs
.send((uint32_t) gs
.dr_read(SLOT_DATA0
));
553 gs
.send((uint64_t) gs
.dr_read(SLOT_DATA0
));
561 gs
.send((uint32_t) gs
.dr_read(SLOT_DATA1
));
563 gs
.send((uint64_t) gs
.dr_read(SLOT_DATA1
));
566 unsigned int current_reg
= 2 * step
+ 1;
568 if (current_reg
== S1
) {
569 gs
.dr_write_load(i
++, S1
, SLOT_DATA_LAST
);
571 gs
.dr_write_store(i
++, current_reg
, SLOT_DATA0
);
572 if (current_reg
+ 1 == S0
) {
573 gs
.dr_write32(i
++, csrr(S0
, CSR_DSCRATCH
));
576 gs
.dr_write_store(i
++, current_reg
+1, SLOT_DATA1
);
585 class register_read_op_t
: public operation_t
588 register_read_op_t(gdbserver_t
& gdbserver
, unsigned int reg
) :
589 operation_t(gdbserver
), reg(reg
) {};
591 bool perform_step(unsigned int step
)
595 if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
597 gs
.dr_write32(0, sw(reg
- REG_XPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
599 gs
.dr_write32(0, sd(reg
- REG_XPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
602 } else if (reg
== REG_PC
) {
605 gs
.send((uint32_t) gs
.dpc
);
611 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
612 // send(p->state.FPR[reg - REG_FPR0]);
614 gs
.dr_write32(0, fsw(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
616 gs
.dr_write32(0, fsd(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
619 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
620 gs
.dr_write32(0, csrr(S0
, reg
- REG_CSR0
));
621 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
623 // If we hit an exception reading the CSR, we'll end up returning ~0 as
624 // the register's value, which is what we want. (Right?)
625 gs
.dr_write(SLOT_DATA0
, ~(uint64_t) 0);
626 } else if (reg
== REG_PRIV
) {
628 gs
.send((uint8_t) get_field(gs
.dcsr
, DCSR_PRV
));
632 gs
.send_packet("E02");
640 unsigned result
= gs
.dr_read(SLOT_DATA_LAST
);
642 gs
.send_packet("E03");
647 gs
.send(gs
.dr_read32(4));
649 gs
.send(gs
.dr_read(SLOT_DATA0
));
662 class register_write_op_t
: public operation_t
665 register_write_op_t(gdbserver_t
& gdbserver
, unsigned int reg
, reg_t value
) :
666 operation_t(gdbserver
), reg(reg
), value(value
) {};
668 bool perform_step(unsigned int step
)
670 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
671 gs
.dr_write(SLOT_DATA0
, value
);
673 gs
.dr_write32(1, csrw(S0
, CSR_DSCRATCH
));
675 } else if (reg
== S1
) {
676 gs
.dr_write_store(1, S0
, SLOT_DATA_LAST
);
678 } else if (reg
>= REG_XPR0
&& reg
<= REG_XPR31
) {
679 gs
.dr_write32(1, addi(reg
, S0
, 0));
681 } else if (reg
== REG_PC
) {
684 } else if (reg
>= REG_FPR0
&& reg
<= REG_FPR31
) {
686 gs
.dr_write32(0, flw(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
688 gs
.dr_write32(0, fld(reg
- REG_FPR0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
691 } else if (reg
>= REG_CSR0
&& reg
<= REG_CSR4095
) {
692 gs
.dr_write32(1, csrw(S0
, reg
- REG_CSR0
));
694 if (reg
== REG_CSR0
+ CSR_SPTBR
) {
696 gs
.sptbr_valid
= true;
698 } else if (reg
== REG_PRIV
) {
699 gs
.dcsr
= set_field(gs
.dcsr
, DCSR_PRV
, value
);
702 gs
.send_packet("E02");
706 gs
.send_packet("OK");
715 class memory_read_op_t
: public operation_t
718 // Read length bytes from vaddr, storing the result into data.
719 // If data is NULL, send the result straight to gdb.
720 memory_read_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, unsigned int length
,
721 unsigned char *data
=NULL
) :
722 operation_t(gdbserver
), vaddr(vaddr
), length(length
), data(data
), index(0)
724 buf
= new uint8_t[length
];
732 bool perform_step(unsigned int step
)
735 // address goes in S0
736 paddr
= gs
.translate(vaddr
);
737 access_size
= gs
.find_access_size(paddr
, length
);
739 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
740 switch (access_size
) {
742 gs
.dr_write32(1, lb(S1
, S0
, 0));
745 gs
.dr_write32(1, lh(S1
, S0
, 0));
748 gs
.dr_write32(1, lw(S1
, S0
, 0));
751 gs
.dr_write32(1, ld(S1
, S0
, 0));
754 gs
.dr_write_store(2, S1
, SLOT_DATA1
);
756 gs
.dr_write(SLOT_DATA0
, paddr
);
762 if (gs
.dr_read32(DEBUG_RAM_SIZE
/ 4 - 1)) {
763 // Note that OpenOCD doesn't report this error to gdb by default. They
764 // think it can mess up stack tracing. So far I haven't seen any
766 gs
.send_packet("E99");
770 reg_t value
= gs
.dr_read(SLOT_DATA1
);
771 for (unsigned int i
= 0; i
< access_size
; i
++) {
773 *(data
++) = value
& 0xff;
774 D(fprintf(stderr
, "%02x", (unsigned int) (value
& 0xff)));
776 buf
[index
++] = value
& 0xff;
781 D(fprintf(stderr
, "\n"));
783 length
-= access_size
;
784 paddr
+= access_size
;
790 for (unsigned int i
= 0; i
< index
; i
++) {
791 sprintf(buffer
, "%02x", (unsigned int) buf
[i
]);
798 gs
.dr_write(SLOT_DATA0
, paddr
);
809 unsigned int access_size
;
814 class memory_write_op_t
: public operation_t
817 memory_write_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, unsigned int length
,
818 const unsigned char *data
) :
819 operation_t(gdbserver
), vaddr(vaddr
), offset(0), length(length
), data(data
) {};
821 ~memory_write_op_t() {
825 bool perform_step(unsigned int step
)
827 reg_t paddr
= gs
.translate(vaddr
);
829 unsigned int data_offset
;
832 data_offset
= slot_offset32
[SLOT_DATA1
];
835 data_offset
= slot_offset64
[SLOT_DATA1
];
838 data_offset
= slot_offset128
[SLOT_DATA1
];
845 access_size
= gs
.find_access_size(paddr
, length
);
847 D(fprintf(stderr
, "write to 0x%lx -> 0x%lx (access=%d): ", vaddr
, paddr
,
849 for (unsigned int i
= 0; i
< length
; i
++) {
850 D(fprintf(stderr
, "%02x", data
[i
]));
852 D(fprintf(stderr
, "\n"));
854 // address goes in S0
855 gs
.dr_write_load(0, S0
, SLOT_DATA0
);
856 switch (access_size
) {
858 gs
.dr_write32(1, lb(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
859 gs
.dr_write32(2, sb(S1
, S0
, 0));
860 gs
.dr_write32(data_offset
, data
[0]);
863 gs
.dr_write32(1, lh(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
864 gs
.dr_write32(2, sh(S1
, S0
, 0));
865 gs
.dr_write32(data_offset
, data
[0] | (data
[1] << 8));
868 gs
.dr_write32(1, lw(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
869 gs
.dr_write32(2, sw(S1
, S0
, 0));
870 gs
.dr_write32(data_offset
, data
[0] | (data
[1] << 8) |
871 (data
[2] << 16) | (data
[3] << 24));
874 gs
.dr_write32(1, ld(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 4*data_offset
));
875 gs
.dr_write32(2, sd(S1
, S0
, 0));
876 gs
.dr_write32(data_offset
, data
[0] | (data
[1] << 8) |
877 (data
[2] << 16) | (data
[3] << 24));
878 gs
.dr_write32(data_offset
+1, data
[4] | (data
[5] << 8) |
879 (data
[6] << 16) | (data
[7] << 24));
882 fprintf(stderr
, "gdbserver error: write %d bytes to 0x%016" PRIx64
883 " -> 0x%016" PRIx64
"; access_size=%d\n",
884 length
, vaddr
, paddr
, access_size
);
885 gs
.send_packet("E12");
889 gs
.dr_write(SLOT_DATA0
, paddr
);
895 if (gs
.dr_read32(DEBUG_RAM_SIZE
/ 4 - 1)) {
896 gs
.send_packet("E98");
900 offset
+= access_size
;
901 if (offset
>= length
) {
902 gs
.send_packet("OK");
905 const unsigned char *d
= data
+ offset
;
906 switch (access_size
) {
908 gs
.dr_write32(data_offset
, d
[0]);
911 gs
.dr_write32(data_offset
, d
[0] | (d
[1] << 8));
914 gs
.dr_write32(data_offset
, d
[0] | (d
[1] << 8) |
915 (d
[2] << 16) | (d
[3] << 24));
918 gs
.dr_write32(data_offset
, d
[0] | (d
[1] << 8) |
919 (d
[2] << 16) | (d
[3] << 24));
920 gs
.dr_write32(data_offset
+1, d
[4] | (d
[5] << 8) |
921 (d
[6] << 16) | (d
[7] << 24));
924 gs
.send_packet("E13");
927 gs
.dr_write(SLOT_DATA0
, paddr
+ offset
);
937 unsigned int access_size
;
938 const unsigned char *data
;
941 class collect_translation_info_op_t
: public operation_t
944 // Read sufficient information from the target into gdbserver structures so
945 // that it's possible to translate vaddr, vaddr+length, and all addresses
946 // in between to physical addresses.
947 collect_translation_info_op_t(gdbserver_t
& gdbserver
, reg_t vaddr
, size_t length
) :
948 operation_t(gdbserver
), state(STATE_START
), vaddr(vaddr
), length(length
) {};
950 bool perform_step(unsigned int step
)
952 unsigned int vm
= gs
.virtual_memory();
957 // Nothing to be done.
979 sprintf(buf
, "VM mode %d is not supported by gdbserver.cc.", vm
);
981 return true; // die doesn't return, but gcc doesn't know that.
986 // Perform any reads from the just-completed action.
990 case STATE_READ_SPTBR
:
991 gs
.sptbr
= gs
.dr_read(SLOT_DATA0
);
992 gs
.sptbr_valid
= true;
996 gs
.pte_cache
[pte_addr
] = gs
.dr_read32(4);
998 gs
.pte_cache
[pte_addr
] = ((uint64_t) gs
.dr_read32(5) << 32) |
1001 D(fprintf(stderr
, "pte_cache[0x%lx] = 0x%lx\n", pte_addr
, gs
.pte_cache
[pte_addr
]));
1005 // Set up the next action.
1006 // We only get here for VM_SV32/39/38.
1008 if (!gs
.sptbr_valid
) {
1009 state
= STATE_READ_SPTBR
;
1010 gs
.dr_write32(0, csrr(S0
, CSR_SPTBR
));
1011 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
1012 gs
.dr_write_jump(2);
1013 gs
.set_interrupt(0);
1017 reg_t base
= gs
.sptbr
<< PGSHIFT
;
1018 int ptshift
= (levels
- 1) * ptidxbits
;
1019 for (unsigned int i
= 0; i
< levels
; i
++, ptshift
-= ptidxbits
) {
1020 reg_t idx
= (vaddr
>> (PGSHIFT
+ ptshift
)) & ((1 << ptidxbits
) - 1);
1022 pte_addr
= base
+ idx
* ptesize
;
1023 auto it
= gs
.pte_cache
.find(pte_addr
);
1024 if (it
== gs
.pte_cache
.end()) {
1025 state
= STATE_READ_PTE
;
1027 gs
.dr_write32(0, lw(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
1028 gs
.dr_write32(1, lw(S1
, S0
, 0));
1029 gs
.dr_write32(2, sw(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
1031 assert(gs
.xlen
>= 64);
1032 gs
.dr_write32(0, ld(S0
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
1033 gs
.dr_write32(1, ld(S1
, S0
, 0));
1034 gs
.dr_write32(2, sd(S1
, 0, (uint16_t) DEBUG_RAM_START
+ 16));
1036 gs
.dr_write32(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*3))));
1037 gs
.dr_write32(4, pte_addr
);
1038 gs
.dr_write32(5, pte_addr
>> 32);
1039 gs
.set_interrupt(0);
1043 reg_t pte
= gs
.pte_cache
[pte_addr
];
1044 reg_t ppn
= pte
>> PTE_PPN_SHIFT
;
1046 if (PTE_TABLE(pte
)) { // next level of page table
1047 base
= ppn
<< PGSHIFT
;
1049 // We've collected all the data required for the translation.
1054 "ERROR: gdbserver couldn't find appropriate PTEs to translate 0x%016" PRIx64
"\n",
1067 unsigned int levels
;
1068 unsigned int ptidxbits
;
1069 unsigned int ptesize
;
1073 class hardware_breakpoint_insert_op_t
: public operation_t
1076 hardware_breakpoint_insert_op_t(gdbserver_t
& gdbserver
,
1077 hardware_breakpoint_t bp
) :
1078 operation_t(gdbserver
), state(STATE_START
), bp(bp
) {};
1080 void write_new_index_program()
1082 gs
.dr_write_load(0, S0
, SLOT_DATA1
);
1083 gs
.dr_write32(1, csrw(S0
, CSR_TSELECT
));
1084 gs
.dr_write32(2, csrr(S0
, CSR_TSELECT
));
1085 gs
.dr_write_store(3, S0
, SLOT_DATA1
);
1086 gs
.dr_write_jump(4);
1087 gs
.dr_write(SLOT_DATA1
, bp
.index
);
1090 bool perform_step(unsigned int step
)
1095 write_new_index_program();
1096 state
= STATE_CHECK_INDEX
;
1099 case STATE_CHECK_INDEX
:
1100 if (gs
.dr_read(SLOT_DATA1
) != bp
.index
) {
1101 // We've exhausted breakpoints without finding an appropriate one.
1102 gs
.send_packet("E58");
1106 gs
.dr_write32(0, csrr(S0
, CSR_TDATA1
));
1107 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
1108 gs
.dr_write_jump(2);
1109 state
= STATE_CHECK_MCONTROL
;
1112 case STATE_CHECK_MCONTROL
:
1114 reg_t mcontrol
= gs
.dr_read(SLOT_DATA0
);
1115 unsigned int type
= mcontrol
>> (gs
.xlen
- 4);
1117 // We've exhausted breakpoints without finding an appropriate one.
1118 gs
.send_packet("E58");
1123 !get_field(mcontrol
, MCONTROL_EXECUTE
) &&
1124 !get_field(mcontrol
, MCONTROL_LOAD
) &&
1125 !get_field(mcontrol
, MCONTROL_STORE
)) {
1126 // Found an unused trigger.
1127 gs
.dr_write_load(0, S0
, SLOT_DATA1
);
1128 gs
.dr_write32(1, csrw(S0
, CSR_TDATA1
));
1129 gs
.dr_write_jump(2);
1130 mcontrol
= set_field(0, MCONTROL_ACTION
, MCONTROL_ACTION_DEBUG_MODE
);
1131 mcontrol
= set_field(mcontrol
, MCONTROL_DMODE(gs
.xlen
), 1);
1132 mcontrol
= set_field(mcontrol
, MCONTROL_MATCH
, MCONTROL_MATCH_EQUAL
);
1133 mcontrol
= set_field(mcontrol
, MCONTROL_M
, 1);
1134 mcontrol
= set_field(mcontrol
, MCONTROL_H
, 1);
1135 mcontrol
= set_field(mcontrol
, MCONTROL_S
, 1);
1136 mcontrol
= set_field(mcontrol
, MCONTROL_U
, 1);
1137 mcontrol
= set_field(mcontrol
, MCONTROL_EXECUTE
, bp
.execute
);
1138 mcontrol
= set_field(mcontrol
, MCONTROL_LOAD
, bp
.load
);
1139 mcontrol
= set_field(mcontrol
, MCONTROL_STORE
, bp
.store
);
1140 // For store triggers it's nicer to fire just before the
1141 // instruction than just after. However, gdb doesn't clear the
1142 // breakpoints and step before resuming from a store trigger.
1143 // That means that without extra code, you'll keep hitting the
1144 // same watchpoint over and over again. That's not useful at all.
1145 // Instead of fixing this the right way, just set timing=1 for
1147 if (bp
.load
|| bp
.store
)
1148 mcontrol
= set_field(mcontrol
, MCONTROL_TIMING
, 1);
1150 gs
.dr_write(SLOT_DATA1
, mcontrol
);
1151 state
= STATE_WRITE_ADDRESS
;
1154 write_new_index_program();
1155 state
= STATE_CHECK_INDEX
;
1160 case STATE_WRITE_ADDRESS
:
1162 gs
.dr_write_load(0, S0
, SLOT_DATA1
);
1163 gs
.dr_write32(1, csrw(S0
, CSR_TDATA2
));
1164 gs
.dr_write_jump(2);
1165 gs
.dr_write(SLOT_DATA1
, bp
.vaddr
);
1166 gs
.set_interrupt(0);
1167 gs
.send_packet("OK");
1169 gs
.hardware_breakpoints
.insert(bp
);
1175 gs
.set_interrupt(0);
1183 STATE_CHECK_MCONTROL
,
1186 hardware_breakpoint_t bp
;
1189 class maybe_save_tselect_op_t
: public operation_t
1192 maybe_save_tselect_op_t(gdbserver_t
& gdbserver
) : operation_t(gdbserver
) {};
1193 bool perform_step(unsigned int step
) {
1194 if (gs
.tselect_valid
)
1199 gs
.dr_write32(0, csrr(S0
, CSR_TDATA1
));
1200 gs
.dr_write_store(1, S0
, SLOT_DATA0
);
1201 gs
.dr_write_jump(2);
1202 gs
.set_interrupt(0);
1205 gs
.tselect
= gs
.dr_read(SLOT_DATA0
);
1206 gs
.tselect_valid
= true;
1213 class maybe_restore_tselect_op_t
: public operation_t
1216 maybe_restore_tselect_op_t(gdbserver_t
& gdbserver
) : operation_t(gdbserver
) {};
1217 bool perform_step(unsigned int step
) {
1218 if (gs
.tselect_valid
) {
1219 gs
.dr_write_load(0, S0
, SLOT_DATA1
);
1220 gs
.dr_write32(1, csrw(S0
, CSR_TSELECT
));
1221 gs
.dr_write_jump(2);
1222 gs
.dr_write(SLOT_DATA1
, gs
.tselect
);
1228 class hardware_breakpoint_remove_op_t
: public operation_t
1231 hardware_breakpoint_remove_op_t(gdbserver_t
& gdbserver
,
1232 hardware_breakpoint_t bp
) :
1233 operation_t(gdbserver
), bp(bp
) {};
1235 bool perform_step(unsigned int step
) {
1236 gs
.dr_write32(0, addi(S0
, ZERO
, bp
.index
));
1237 gs
.dr_write32(1, csrw(S0
, CSR_TSELECT
));
1238 gs
.dr_write32(2, csrw(ZERO
, CSR_TDATA1
));
1239 gs
.dr_write_jump(3);
1240 gs
.set_interrupt(0);
1245 hardware_breakpoint_t bp
;
1248 ////////////////////////////// gdbserver itself
1250 gdbserver_t::gdbserver_t(uint16_t port
, sim_t
*sim
) :
1254 // gdb likes to send 0x100000 bytes at once when downloading.
1255 recv_buf(0x180000), send_buf(64 * 1024)
1257 socket_fd
= socket(AF_INET
, SOCK_STREAM
, 0);
1258 if (socket_fd
== -1) {
1259 fprintf(stderr
, "failed to make socket: %s (%d)\n", strerror(errno
), errno
);
1263 fcntl(socket_fd
, F_SETFL
, O_NONBLOCK
);
1265 if (setsockopt(socket_fd
, SOL_SOCKET
, SO_REUSEADDR
, &reuseaddr
,
1266 sizeof(int)) == -1) {
1267 fprintf(stderr
, "failed setsockopt: %s (%d)\n", strerror(errno
), errno
);
1271 struct sockaddr_in addr
;
1272 memset(&addr
, 0, sizeof(addr
));
1273 addr
.sin_family
= AF_INET
;
1274 addr
.sin_addr
.s_addr
= INADDR_ANY
;
1275 addr
.sin_port
= htons(port
);
1277 if (bind(socket_fd
, (struct sockaddr
*) &addr
, sizeof(addr
)) == -1) {
1278 fprintf(stderr
, "failed to bind socket: %s (%d)\n", strerror(errno
), errno
);
1282 if (listen(socket_fd
, 1) == -1) {
1283 fprintf(stderr
, "failed to listen on socket: %s (%d)\n", strerror(errno
), errno
);
1288 unsigned int gdbserver_t::find_access_size(reg_t address
, int length
)
1290 reg_t composite
= address
| length
;
1291 if ((composite
& 0x7) == 0 && xlen
>= 64)
1293 if ((composite
& 0x3) == 0)
1298 reg_t
gdbserver_t::translate(reg_t vaddr
)
1300 unsigned int vm
= virtual_memory();
1301 unsigned int levels
, ptidxbits
, ptesize
;
1326 sprintf(buf
, "VM mode %d is not supported by gdbserver.cc.", vm
);
1328 return true; // die doesn't return, but gcc doesn't know that.
1332 // Handle page tables here. There's a bunch of duplicated code with
1333 // collect_translation_info_op_t. :-(
1334 reg_t base
= sptbr
<< PGSHIFT
;
1335 int ptshift
= (levels
- 1) * ptidxbits
;
1336 for (unsigned int i
= 0; i
< levels
; i
++, ptshift
-= ptidxbits
) {
1337 reg_t idx
= (vaddr
>> (PGSHIFT
+ ptshift
)) & ((1 << ptidxbits
) - 1);
1339 reg_t pte_addr
= base
+ idx
* ptesize
;
1340 auto it
= pte_cache
.find(pte_addr
);
1341 if (it
== pte_cache
.end()) {
1342 fprintf(stderr
, "ERROR: gdbserver tried to translate 0x%016" PRIx64
1343 " without first collecting the relevant PTEs.\n", vaddr
);
1344 die("gdbserver_t::translate()");
1347 reg_t pte
= pte_cache
[pte_addr
];
1348 reg_t ppn
= pte
>> PTE_PPN_SHIFT
;
1350 if (PTE_TABLE(pte
)) { // next level of page table
1351 base
= ppn
<< PGSHIFT
;
1353 // We've collected all the data required for the translation.
1354 reg_t vpn
= vaddr
>> PGSHIFT
;
1355 reg_t paddr
= (ppn
| (vpn
& ((reg_t(1) << ptshift
) - 1))) << PGSHIFT
;
1356 paddr
+= vaddr
& (PGSIZE
-1);
1357 D(fprintf(stderr
, "gdbserver translate 0x%lx -> 0x%lx\n", vaddr
, paddr
));
1362 fprintf(stderr
, "ERROR: gdbserver tried to translate 0x%016" PRIx64
1363 " but the relevant PTEs are invalid.\n", vaddr
);
1364 // TODO: Is it better to throw an exception here?
1368 unsigned int gdbserver_t::privilege_mode()
1370 unsigned int mode
= get_field(dcsr
, DCSR_PRV
);
1371 if (get_field(mstatus
, MSTATUS_MPRV
))
1372 mode
= get_field(mstatus
, MSTATUS_MPP
);
1376 unsigned int gdbserver_t::virtual_memory()
1378 unsigned int mode
= privilege_mode();
1381 return get_field(mstatus
, MSTATUS_VM
);
1384 void gdbserver_t::dr_write32(unsigned int index
, uint32_t value
)
1386 sim
->debug_module
.ram_write32(index
, value
);
1389 void gdbserver_t::dr_write64(unsigned int index
, uint64_t value
)
1391 dr_write32(index
, value
);
1392 dr_write32(index
+1, value
>> 32);
1395 void gdbserver_t::dr_write(enum slot slot
, uint64_t value
)
1399 dr_write32(slot_offset32
[slot
], value
);
1402 dr_write64(slot_offset64
[slot
], value
);
1410 void gdbserver_t::dr_write_jump(unsigned int index
)
1412 dr_write32(index
, jal(0,
1413 (uint32_t) (DEBUG_ROM_RESUME
- (DEBUG_RAM_START
+ 4*index
))));
1416 void gdbserver_t::dr_write_store(unsigned int index
, unsigned int reg
, enum slot slot
)
1418 assert(slot
!= SLOT_INST0
|| index
> 2);
1419 assert(slot
!= SLOT_DATA0
|| index
< 4 || index
> 6);
1420 assert(slot
!= SLOT_DATA1
|| index
< 5 || index
> 10);
1421 assert(slot
!= SLOT_DATA_LAST
|| index
< 6 || index
> 14);
1424 return dr_write32(index
,
1425 sw(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset32
[slot
]));
1427 return dr_write32(index
,
1428 sd(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset64
[slot
]));
1430 return dr_write32(index
,
1431 sq(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset128
[slot
]));
1433 fprintf(stderr
, "xlen is %d!\n", xlen
);
1438 void gdbserver_t::dr_write_load(unsigned int index
, unsigned int reg
, enum slot slot
)
1442 return dr_write32(index
,
1443 lw(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset32
[slot
]));
1445 return dr_write32(index
,
1446 ld(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset64
[slot
]));
1448 return dr_write32(index
,
1449 lq(reg
, 0, (uint16_t) DEBUG_RAM_START
+ 4 * slot_offset128
[slot
]));
1451 fprintf(stderr
, "xlen is %d!\n", xlen
);
1456 uint32_t gdbserver_t::dr_read32(unsigned int index
)
1458 uint32_t value
= sim
->debug_module
.ram_read32(index
);
1459 D(fprintf(stderr
, "read32(%d) -> 0x%x\n", index
, value
));
1463 uint64_t gdbserver_t::dr_read64(unsigned int index
)
1465 return ((uint64_t) dr_read32(index
+1) << 32) | dr_read32(index
);
1468 uint64_t gdbserver_t::dr_read(enum slot slot
)
1472 return dr_read32(slot_offset32
[slot
]);
1474 return dr_read64(slot_offset64
[slot
]);
1482 void gdbserver_t::add_operation(operation_t
* operation
)
1484 operation_queue
.push(operation
);
1487 void gdbserver_t::accept()
1489 client_fd
= ::accept(socket_fd
, NULL
, NULL
);
1490 if (client_fd
== -1) {
1491 if (errno
== EAGAIN
) {
1492 // No client waiting to connect right now.
1494 fprintf(stderr
, "failed to accept on socket: %s (%d)\n", strerror(errno
),
1499 fcntl(client_fd
, F_SETFL
, O_NONBLOCK
);
1502 extended_mode
= false;
1504 // gdb wants the core to be halted when it attaches.
1505 add_operation(new halt_op_t(*this));
1509 void gdbserver_t::read()
1511 // Reading from a non-blocking socket still blocks if there is no data
1514 size_t count
= recv_buf
.contiguous_empty_size();
1515 ssize_t bytes
= ::read(client_fd
, recv_buf
.contiguous_empty(), count
);
1517 if (errno
== EAGAIN
) {
1518 // We'll try again the next call.
1520 fprintf(stderr
, "failed to read on socket: %s (%d)\n", strerror(errno
), errno
);
1523 } else if (bytes
== 0) {
1524 // The remote disconnected.
1526 processor_t
*p
= sim
->get_core(0);
1527 // TODO p->set_halted(false, HR_NONE);
1531 recv_buf
.data_added(bytes
);
1535 void gdbserver_t::write()
1537 if (send_buf
.empty())
1540 while (!send_buf
.empty()) {
1541 unsigned int count
= send_buf
.contiguous_data_size();
1543 ssize_t bytes
= ::write(client_fd
, send_buf
.contiguous_data(), count
);
1545 fprintf(stderr
, "failed to write to socket: %s (%d)\n", strerror(errno
), errno
);
1547 } else if (bytes
== 0) {
1548 // Client can't take any more data right now.
1551 D(fprintf(stderr
, "wrote %ld bytes: ", bytes
));
1552 for (unsigned int i
= 0; i
< bytes
; i
++) {
1553 D(fprintf(stderr
, "%c", send_buf
[i
]));
1555 D(fprintf(stderr
, "\n"));
1556 send_buf
.consume(bytes
);
1561 void print_packet(const std::vector
<uint8_t> &packet
)
1563 for (uint8_t c
: packet
) {
1564 if (c
>= ' ' and c
<= '~')
1565 fprintf(stderr
, "%c", c
);
1567 fprintf(stderr
, "\\x%02x", c
);
1569 fprintf(stderr
, "\n");
1572 uint8_t compute_checksum(const std::vector
<uint8_t> &packet
)
1574 uint8_t checksum
= 0;
1575 for (auto i
= packet
.begin() + 1; i
!= packet
.end() - 3; i
++ ) {
1581 uint8_t character_hex_value(uint8_t character
)
1583 if (character
>= '0' && character
<= '9')
1584 return character
- '0';
1585 if (character
>= 'a' && character
<= 'f')
1586 return 10 + character
- 'a';
1587 if (character
>= 'A' && character
<= 'F')
1588 return 10 + character
- 'A';
1592 uint8_t extract_checksum(const std::vector
<uint8_t> &packet
)
1594 return character_hex_value(*(packet
.end() - 1)) +
1595 16 * character_hex_value(*(packet
.end() - 2));
1598 void gdbserver_t::process_requests()
1600 // See https://sourceware.org/gdb/onlinedocs/gdb/Remote-Protocol.html
1602 while (!recv_buf
.empty()) {
1603 std::vector
<uint8_t> packet
;
1604 for (unsigned int i
= 0; i
< recv_buf
.size(); i
++) {
1605 uint8_t b
= recv_buf
[i
];
1607 if (packet
.empty() && expect_ack
&& b
== '+') {
1608 recv_buf
.consume(1);
1612 if (packet
.empty() && b
== 3) {
1613 D(fprintf(stderr
, "Received interrupt\n"));
1614 recv_buf
.consume(1);
1620 // Start of new packet.
1621 if (!packet
.empty()) {
1622 fprintf(stderr
, "Received malformed %ld-byte packet from debug client: ",
1624 print_packet(packet
);
1625 recv_buf
.consume(i
);
1630 packet
.push_back(b
);
1632 // Packets consist of $<packet-data>#<checksum>
1633 // where <checksum> is
1634 if (packet
.size() >= 4 &&
1635 packet
[packet
.size()-3] == '#') {
1636 handle_packet(packet
);
1637 recv_buf
.consume(i
+1);
1641 // There's a partial packet in the buffer. Wait until we get more data to
1643 if (packet
.size()) {
1648 if (recv_buf
.full()) {
1650 "Receive buffer is full, but no complete packet was found!\n");
1651 for (unsigned line
= 0; line
< 8; line
++) {
1652 for (unsigned i
= 0; i
< 16; i
++) {
1653 fprintf(stderr
, "%02x ", recv_buf
.entry(line
* 16 + i
));
1655 for (unsigned i
= 0; i
< 16; i
++) {
1656 uint8_t e
= recv_buf
.entry(line
* 16 + i
);
1657 if (e
>= ' ' && e
<= '~')
1658 fprintf(stderr
, "%c", e
);
1660 fprintf(stderr
, ".");
1662 fprintf(stderr
, "\n");
1664 assert(!recv_buf
.full());
1668 void gdbserver_t::handle_halt_reason(const std::vector
<uint8_t> &packet
)
1673 void gdbserver_t::handle_general_registers_read(const std::vector
<uint8_t> &packet
)
1675 add_operation(new general_registers_read_op_t(*this));
1678 void gdbserver_t::set_interrupt(uint32_t hartid
) {
1679 sim
->debug_module
.set_interrupt(hartid
);
1682 // First byte is the most-significant one.
1683 // Eg. "08675309" becomes 0x08675309.
1684 uint64_t consume_hex_number(std::vector
<uint8_t>::const_iterator
&iter
,
1685 std::vector
<uint8_t>::const_iterator end
)
1689 while (iter
!= end
) {
1691 uint64_t c_value
= character_hex_value(c
);
1701 // First byte is the least-significant one.
1702 // Eg. "08675309" becomes 0x09536708
1703 uint64_t gdbserver_t::consume_hex_number_le(
1704 std::vector
<uint8_t>::const_iterator
&iter
,
1705 std::vector
<uint8_t>::const_iterator end
)
1708 unsigned int shift
= 4;
1710 while (iter
!= end
) {
1712 uint64_t c_value
= character_hex_value(c
);
1716 value
|= c_value
<< shift
;
1717 if ((shift
% 8) == 0)
1722 if (shift
> (xlen
+4)) {
1724 "gdb sent too many data bytes. That means it thinks XLEN is greater "
1725 "than %d.\nTo fix that, tell gdb: set arch riscv:rv%d\n",
1731 void consume_string(std::string
&str
, std::vector
<uint8_t>::const_iterator
&iter
,
1732 std::vector
<uint8_t>::const_iterator end
, uint8_t separator
)
1734 while (iter
!= end
&& *iter
!= separator
) {
1735 str
.append(1, (char) *iter
);
1740 void gdbserver_t::handle_register_read(const std::vector
<uint8_t> &packet
)
1744 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1745 unsigned int n
= consume_hex_number(iter
, packet
.end());
1747 return send_packet("E01");
1749 add_operation(new register_read_op_t(*this, n
));
1752 void gdbserver_t::handle_register_write(const std::vector
<uint8_t> &packet
)
1756 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1757 unsigned int n
= consume_hex_number(iter
, packet
.end());
1759 return send_packet("E05");
1762 reg_t value
= consume_hex_number_le(iter
, packet
.end());
1764 return send_packet("E06");
1766 processor_t
*p
= sim
->get_core(0);
1768 add_operation(new register_write_op_t(*this, n
, value
));
1770 return send_packet("OK");
1773 void gdbserver_t::handle_memory_read(const std::vector
<uint8_t> &packet
)
1776 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1777 reg_t address
= consume_hex_number(iter
, packet
.end());
1779 return send_packet("E10");
1781 reg_t length
= consume_hex_number(iter
, packet
.end());
1783 return send_packet("E11");
1785 add_operation(new collect_translation_info_op_t(*this, address
, length
));
1786 add_operation(new memory_read_op_t(*this, address
, length
));
1789 void gdbserver_t::handle_memory_binary_write(const std::vector
<uint8_t> &packet
)
1791 // X addr,length:XX...
1792 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1793 reg_t address
= consume_hex_number(iter
, packet
.end());
1795 return send_packet("E20");
1797 reg_t length
= consume_hex_number(iter
, packet
.end());
1799 return send_packet("E21");
1803 return send_packet("OK");
1806 unsigned char *data
= new unsigned char[length
];
1807 for (unsigned int i
= 0; i
< length
; i
++) {
1808 if (iter
== packet
.end()) {
1809 return send_packet("E22");
1814 // The binary data representation uses 7d (ascii ‘}’) as an escape
1815 // character. Any escaped byte is transmitted as the escape character
1816 // followed by the original character XORed with 0x20. For example, the
1817 // byte 0x7d would be transmitted as the two bytes 0x7d 0x5d. The bytes
1818 // 0x23 (ascii ‘#’), 0x24 (ascii ‘$’), and 0x7d (ascii ‘}’) must always
1820 if (iter
== packet
.end()) {
1821 return send_packet("E23");
1829 return send_packet("E4b"); // EOVERFLOW
1831 add_operation(new collect_translation_info_op_t(*this, address
, length
));
1832 add_operation(new memory_write_op_t(*this, address
, length
, data
));
1835 void gdbserver_t::handle_continue(const std::vector
<uint8_t> &packet
)
1838 processor_t
*p
= sim
->get_core(0);
1839 if (packet
[2] != '#') {
1840 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1841 dpc
= consume_hex_number(iter
, packet
.end());
1843 return send_packet("E30");
1846 add_operation(new maybe_restore_tselect_op_t(*this));
1847 add_operation(new continue_op_t(*this, false));
1850 void gdbserver_t::handle_step(const std::vector
<uint8_t> &packet
)
1853 if (packet
[2] != '#') {
1854 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1856 //p->state.pc = consume_hex_number(iter, packet.end());
1858 return send_packet("E40");
1861 add_operation(new maybe_restore_tselect_op_t(*this));
1862 add_operation(new continue_op_t(*this, true));
1865 void gdbserver_t::handle_kill(const std::vector
<uint8_t> &packet
)
1868 // The exact effect of this packet is not specified.
1869 // Looks like OpenOCD disconnects?
1873 void gdbserver_t::handle_extended(const std::vector
<uint8_t> &packet
)
1875 // Enable extended mode. In extended mode, the remote server is made
1876 // persistent. The ‘R’ packet is used to restart the program being debugged.
1878 extended_mode
= true;
1881 void gdbserver_t::software_breakpoint_insert(reg_t vaddr
, unsigned int size
)
1883 fence_i_required
= true;
1884 add_operation(new collect_translation_info_op_t(*this, vaddr
, size
));
1885 unsigned char* inst
= new unsigned char[4];
1887 inst
[0] = C_EBREAK
& 0xff;
1888 inst
[1] = (C_EBREAK
>> 8) & 0xff;
1890 inst
[0] = EBREAK
& 0xff;
1891 inst
[1] = (EBREAK
>> 8) & 0xff;
1892 inst
[2] = (EBREAK
>> 16) & 0xff;
1893 inst
[3] = (EBREAK
>> 24) & 0xff;
1896 software_breakpoint_t bp
= {
1900 software_breakpoints
[vaddr
] = bp
;
1901 add_operation(new memory_read_op_t(*this, bp
.vaddr
, bp
.size
,
1902 software_breakpoints
[bp
.vaddr
].instruction
));
1903 add_operation(new memory_write_op_t(*this, bp
.vaddr
, bp
.size
, inst
));
1906 void gdbserver_t::software_breakpoint_remove(reg_t vaddr
, unsigned int size
)
1908 fence_i_required
= true;
1909 add_operation(new collect_translation_info_op_t(*this, vaddr
, size
));
1911 software_breakpoint_t found_bp
= software_breakpoints
[vaddr
];
1912 unsigned char* instruction
= new unsigned char[4];
1913 memcpy(instruction
, found_bp
.instruction
, 4);
1914 add_operation(new memory_write_op_t(*this, found_bp
.vaddr
,
1915 found_bp
.size
, instruction
));
1916 software_breakpoints
.erase(vaddr
);
1919 void gdbserver_t::hardware_breakpoint_insert(const hardware_breakpoint_t
&bp
)
1921 add_operation(new maybe_save_tselect_op_t(*this));
1922 add_operation(new hardware_breakpoint_insert_op_t(*this, bp
));
1925 void gdbserver_t::hardware_breakpoint_remove(const hardware_breakpoint_t
&bp
)
1927 add_operation(new maybe_save_tselect_op_t(*this));
1928 hardware_breakpoint_t found
= *hardware_breakpoints
.find(bp
);
1929 add_operation(new hardware_breakpoint_remove_op_t(*this, found
));
1932 void gdbserver_t::handle_breakpoint(const std::vector
<uint8_t> &packet
)
1934 // insert: Z type,addr,length
1935 // remove: z type,addr,length
1937 // type: 0 - software breakpoint, 1 - hardware breakpoint, 2 - write
1938 // watchpoint, 3 - read watchpoint, 4 - access watchpoint; addr is address;
1939 // length is in bytes. For a software breakpoint, length specifies the size
1940 // of the instruction to be patched. For hardware breakpoints and watchpoints
1941 // length specifies the memory region to be monitored. To avoid potential
1942 // problems with duplicate packets, the operations should be implemented in
1943 // an idempotent way.
1945 bool insert
= (packet
[1] == 'Z');
1946 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
1947 gdb_breakpoint_type_t type
= static_cast<gdb_breakpoint_type_t
>(
1948 consume_hex_number(iter
, packet
.end()));
1950 return send_packet("E50");
1952 reg_t address
= consume_hex_number(iter
, packet
.end());
1954 return send_packet("E51");
1956 unsigned int size
= consume_hex_number(iter
, packet
.end());
1957 // There may be more options after a ; here, but we don't support that.
1959 return send_packet("E52");
1963 if (size
!= 2 && size
!= 4) {
1964 return send_packet("E53");
1967 software_breakpoint_insert(address
, size
);
1969 software_breakpoint_remove(address
, size
);
1978 hardware_breakpoint_t bp
= {
1982 bp
.load
= (type
== GB_READ
|| type
== GB_ACCESS
);
1983 bp
.store
= (type
== GB_WRITE
|| type
== GB_ACCESS
);
1984 bp
.execute
= (type
== GB_HARDWARE
|| type
== GB_ACCESS
);
1986 hardware_breakpoint_insert(bp
);
1987 // Insert might fail if there's no space, so the insert operation will
1988 // send its own OK (or not).
1991 hardware_breakpoint_remove(bp
);
1997 return send_packet("E56");
2000 return send_packet("OK");
2003 void gdbserver_t::handle_query(const std::vector
<uint8_t> &packet
)
2006 std::vector
<uint8_t>::const_iterator iter
= packet
.begin() + 2;
2008 consume_string(name
, iter
, packet
.end(), ':');
2009 if (iter
!= packet
.end())
2011 if (name
== "Supported") {
2013 while (iter
!= packet
.end()) {
2014 std::string feature
;
2015 consume_string(feature
, iter
, packet
.end(), ';');
2016 if (iter
!= packet
.end())
2018 if (feature
== "swbreak+") {
2022 send("PacketSize=131072;");
2023 return end_packet();
2026 D(fprintf(stderr
, "Unsupported query %s\n", name
.c_str()));
2027 return send_packet("");
2030 void gdbserver_t::handle_packet(const std::vector
<uint8_t> &packet
)
2032 if (compute_checksum(packet
) != extract_checksum(packet
)) {
2033 fprintf(stderr
, "Received %ld-byte packet with invalid checksum\n", packet
.size());
2034 fprintf(stderr
, "Computed checksum: %x\n", compute_checksum(packet
));
2035 print_packet(packet
);
2040 D(fprintf(stderr
, "Received %ld-byte packet from debug client: ", packet
.size()));
2041 D(print_packet(packet
));
2044 switch (packet
[1]) {
2046 return handle_extended(packet
);
2048 return handle_halt_reason(packet
);
2050 return handle_general_registers_read(packet
);
2052 // return handle_kill(packet);
2054 return handle_memory_read(packet
);
2056 // return handle_memory_write(packet);
2058 return handle_memory_binary_write(packet
);
2060 return handle_register_read(packet
);
2062 return handle_register_write(packet
);
2064 return handle_continue(packet
);
2066 return handle_step(packet
);
2069 return handle_breakpoint(packet
);
2072 return handle_query(packet
);
2076 D(fprintf(stderr
, "** Unsupported packet: "));
2077 D(print_packet(packet
));
2081 void gdbserver_t::handle_interrupt()
2083 processor_t
*p
= sim
->get_core(0);
2084 add_operation(new halt_op_t(*this, true));
2087 void gdbserver_t::handle()
2089 if (client_fd
> 0) {
2090 processor_t
*p
= sim
->get_core(0);
2092 bool interrupt
= sim
->debug_module
.get_interrupt(0);
2094 if (!interrupt
&& !operation_queue
.empty()) {
2095 operation_t
*operation
= operation_queue
.front();
2096 if (operation
->step()) {
2097 operation_queue
.pop();
2102 bool halt_notification
= sim
->debug_module
.get_halt_notification(0);
2103 if (halt_notification
) {
2104 sim
->debug_module
.clear_halt_notification(0);
2105 add_operation(new halt_op_t(*this, true));
2115 if (operation_queue
.empty()) {
2116 this->process_requests();
2120 void gdbserver_t::send(const char* msg
)
2122 unsigned int length
= strlen(msg
);
2123 for (const char *c
= msg
; *c
; c
++)
2124 running_checksum
+= *c
;
2125 send_buf
.append((const uint8_t *) msg
, length
);
2128 void gdbserver_t::send(uint64_t value
)
2131 for (unsigned int i
= 0; i
< 8; i
++) {
2132 sprintf(buffer
, "%02x", (int) (value
& 0xff));
2138 void gdbserver_t::send(uint32_t value
)
2141 for (unsigned int i
= 0; i
< 4; i
++) {
2142 sprintf(buffer
, "%02x", (int) (value
& 0xff));
2148 void gdbserver_t::send(uint8_t value
)
2151 sprintf(buffer
, "%02x", (int) value
);
2155 void gdbserver_t::send_packet(const char* data
)
2163 void gdbserver_t::start_packet()
2166 running_checksum
= 0;
2169 void gdbserver_t::end_packet(const char* data
)
2175 char checksum_string
[4];
2176 sprintf(checksum_string
, "#%02x", running_checksum
);
2177 send(checksum_string
);