projects
/
riscv-isa-sim.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
91866dcfef7d3f46ba994c5265063c8bd279f369
[riscv-isa-sim.git]
/
riscv
/
insns
/
amoand_w.h
1
reg_t v
=
MMU
.
load_int32
(
RS1
);
2
MMU
.
store_uint32
(
RS1
,
RS2
&
v
);
3
RD
=
v
;