a5abc488683db1fd84d51a717786b31f6d9e56a8
[riscv-isa-sim.git] / riscv / insns / amow_min.h
1 int32_t v = mmu.load_int32(RB);
2 mmu.store_uint32(RB, std::min(int32_t(RA),v));
3 RC = v;