a78ed25c04c3767bca5ff8645f400698fc714c71
[riscv-isa-sim.git] / riscv / insns / fmadd_s.h
1 require_extension('F');
2 require_fp;
3 softfloat_roundingMode = RM;
4 WRITE_FRD(f32_mulAdd(f32(FRS1), f32(FRS2), f32(FRS3)).v);
5 set_fp_exceptions;