riscv/insns/mfpcr.h

   1 require_supervisor;
   2
   3 reg_t val;
   4
   5 switch(insn.rtype.rb)
   6 {
   7   case 0:
   8     val = sr;
   9     break;
  10   case 1:
  11     val = epc;
  12     break;
  13   case 2:
  14     val = badvaddr;
  15     break;
  16   case 3:
  17     val = ebase;
  18     break;
  19
  20   case 8:
  21     val = MEMSIZE >> 12;
  22     break;
  23
  24   case 17:
  25     val = sim->get_fromhost();
  26     break;
  27
  28   case 24:
  29     val = pcr_k0;
  30     break;
  31   case 25:
  32     val = pcr_k1;
  33     break;
  34
  35   default:
  36     val = -1;
  37 }
  38
  39 RC = gprlen == 64 ? val : sext32(val);