a35dc198b0d3eb680946d7e78e428bc4c1adf7fc
[riscv-isa-sim.git] / riscv / insns / msub_d.h
1 require_fp;
2 FRC = f64_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT64_MIN);
3 set_fp_exceptions;