60f10a4d82427bc79b782eac5cd5e753714dc2c7
[riscv-isa-sim.git] / riscv / insns / msub_s.h
1 require_fp;
2 FRC = f32_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT32_MIN);
3 set_fp_exceptions;