8 sim_t::sim_t(int _nprocs
, size_t _memsz
, appserver_link_t
* _applink
)
11 mem((char*)mmap64(NULL
, memsz
, PROT_WRITE
, MAP_PRIVATE
| MAP_ANON
, -1, 0)),
12 procs(std::vector
<processor_t
>(_nprocs
,processor_t(this,mem
,memsz
)))
14 demand(mem
!= MAP_FAILED
, "couldn't allocate target machine's memory");
16 for(int i
= 0; i
< (int)procs
.size(); i
++)
26 void sim_t::set_tohost(reg_t val
)
32 reg_t
sim_t::get_fromhost()
35 applink
->wait_for_packet();
39 void sim_t::run(bool debug
)
41 applink
->wait_for_start();
46 step_all(100,100,false);
51 std::cin
.getline(s
,sizeof(s
)-1);
53 char* p
= strtok(s
," ");
56 interactive_run_noisy(std::vector
<std::string
>(1,"1"));
61 std::vector
<std::string
> args
;
62 while((p
= strtok(NULL
," ")))
66 typedef void (sim_t::*interactive_func
)(const std::vector
<std::string
>&);
67 std::map
<std::string
,interactive_func
> funcs
;
69 funcs
["r"] = &sim_t::interactive_run_noisy
;
70 funcs
["rs"] = &sim_t::interactive_run_silent
;
71 funcs
["rp"] = &sim_t::interactive_run_proc_noisy
;
72 funcs
["rps"] = &sim_t::interactive_run_proc_silent
;
73 funcs
["reg"] = &sim_t::interactive_reg
;
74 funcs
["mem"] = &sim_t::interactive_mem
;
75 funcs
["until"] = &sim_t::interactive_until
;
76 funcs
["q"] = &sim_t::interactive_quit
;
81 (this->*funcs
[cmd
])(args
);
88 void sim_t::step_all(size_t n
, size_t interleave
, bool noisy
)
90 for(size_t j
= 0; j
< n
; j
+=interleave
)
91 for(int i
= 0; i
< (int)procs
.size(); i
++)
92 procs
[i
].step(interleave
,noisy
);
95 void sim_t::interactive_run_noisy(const std::vector
<std::string
>& args
)
97 interactive_run(args
,true);
100 void sim_t::interactive_run_silent(const std::vector
<std::string
>& args
)
102 interactive_run(args
,false);
105 void sim_t::interactive_run(const std::vector
<std::string
>& args
, bool noisy
)
108 step_all(atoi(args
[0].c_str()),1,noisy
);
110 while(1) step_all(1,1,noisy
);
113 void sim_t::interactive_run_proc_noisy(const std::vector
<std::string
>& args
)
115 interactive_run_proc(args
,true);
118 void sim_t::interactive_run_proc_silent(const std::vector
<std::string
>& args
)
120 interactive_run_proc(args
,false);
123 void sim_t::interactive_run_proc(const std::vector
<std::string
>& a
, bool noisy
)
128 int p
= atoi(a
[0].c_str());
129 if(p
>= (int)procs
.size())
133 procs
[p
].step(atoi(a
[1].c_str()),noisy
);
135 while(1) procs
[p
].step(1,noisy
);
138 void sim_t::interactive_quit(const std::vector
<std::string
>& args
)
143 reg_t
sim_t::get_pc(const std::vector
<std::string
>& args
)
146 throw trap_illegal_instruction
;
148 int p
= atoi(args
[0].c_str());
149 if(p
>= (int)procs
.size())
150 throw trap_illegal_instruction
;
155 reg_t
sim_t::get_reg(const std::vector
<std::string
>& args
)
158 throw trap_illegal_instruction
;
160 int p
= atoi(args
[0].c_str());
161 int r
= atoi(args
[1].c_str());
162 if(p
>= (int)procs
.size() || r
>= NGPR
)
163 throw trap_illegal_instruction
;
165 return procs
[p
].R
[r
];
168 void sim_t::interactive_reg(const std::vector
<std::string
>& args
)
170 printf("0x%016llx\n",(unsigned long long)get_reg(args
));
173 reg_t
sim_t::get_mem(const std::vector
<std::string
>& args
)
176 throw trap_illegal_instruction
;
178 reg_t addr
= strtol(args
[0].c_str(),NULL
,16), val
;
179 mmu_t
mmu(mem
,memsz
);
183 val
= mmu
.load_uint64(addr
);
186 val
= mmu
.load_uint32(addr
);
190 val
= mmu
.load_uint16(addr
);
193 val
= mmu
.load_uint8(addr
);
199 void sim_t::interactive_mem(const std::vector
<std::string
>& args
)
201 printf("0x%016llx\n",(unsigned long long)get_mem(args
));
204 void sim_t::interactive_until(const std::vector
<std::string
>& args
)
209 std::string cmd
= args
[0];
210 reg_t val
= strtol(args
[args
.size()-1].c_str(),NULL
,16);
212 std::vector
<std::string
> args2
;
213 args2
= std::vector
<std::string
>(args
.begin()+1,args
.end()-1);
219 current
= get_reg(args2
);
220 else if(args
[0] == "pc")
221 current
= get_pc(args2
);
222 else if(args
[0] == "mem")
223 current
= get_mem(args2
);