8e43c2ccb0b11101494a2f404867dd84c727589f
[riscv-isa-sim.git] / riscv / trap.h
1 #ifndef _RISCV_TRAP_H
2 #define _RISCV_TRAP_H
3
4 #define TRAP_LIST \
5 DECLARE_TRAP(instruction_address_misaligned), \
6 DECLARE_TRAP(instruction_access_fault), \
7 DECLARE_TRAP(illegal_instruction), \
8 DECLARE_TRAP(privileged_instruction), \
9 DECLARE_TRAP(fp_disabled), \
10 DECLARE_TRAP(reserved0), \
11 DECLARE_TRAP(syscall), \
12 DECLARE_TRAP(breakpoint), \
13 DECLARE_TRAP(load_address_misaligned), \
14 DECLARE_TRAP(store_address_misaligned), \
15 DECLARE_TRAP(load_access_fault), \
16 DECLARE_TRAP(store_access_fault), \
17 DECLARE_TRAP(vector_disabled), \
18 DECLARE_TRAP(vector_bank), \
19 DECLARE_TRAP(vector_illegal_instruction), \
20 DECLARE_TRAP(reserved1), \
21 DECLARE_TRAP(irq0), \
22 DECLARE_TRAP(irq1), \
23 DECLARE_TRAP(irq2), \
24 DECLARE_TRAP(irq3), \
25 DECLARE_TRAP(irq4), \
26 DECLARE_TRAP(irq5), \
27 DECLARE_TRAP(irq6), \
28 DECLARE_TRAP(irq7), \
29
30 #define DECLARE_TRAP(x) trap_##x
31 enum trap_t
32 {
33 TRAP_LIST
34 NUM_TRAPS
35 };
36 #undef DECLARE_TRAP
37
38 struct halt_t {}; // thrown to stop the processor from running
39
40 extern "C" const char* trap_name(trap_t t);
41
42 #endif