Add verilog implementation of displayport
[libreriscv.git] / shakti / m_class / FlexBus.mdwn
1 # FlexBus
2
3 FlexBus is capable of emulating the 8080-style / ATI MCU Bus, as well as
4 providing support for access to SRAM. It is extremely likely that it will
5 provide access to MCU-style Ethernet PHY ICs such as the DM9000, the
6 AX88180 (gigabit ethernet but an enormous number of pins), the AX88796A
7 (8/16-bit 80186 or MC68k).
8
9 * <http://bugs.libre-riscv.org/show_bug.cgi?id=4>
10 * <https://bitbucket.org/casl/c-class/src/7b924c41f4b4cfe15511bc726b0cd7ee56451952/src/peripherals/flexbus/FlexBus_Types.bsv?at=master&fileviewer=file-view-default>