src/TLB/test/test_address_encoder.py

   1 from nmigen.compat.sim import run_simulation
   2 from TLB.AddressEncoder import AddressEncoder
   3 from TestUtil.test_helper import assert_eq, assert_ne, assert_op
   4
   5
   6 # This function allows for the easy setting of values to the AddressEncoder
   7 # Arguments:
   8 #   dut: The AddressEncoder being tested
   9 #   i (Input): The array of single bits to be written
  10 def set_encoder(dut, i):
  11     yield dut.i.eq(i)
  12     yield
  13
  14 # Checks the single match of the AddressEncoder
  15 # Arguments:
  16 #   dut: The AddressEncoder being tested
  17 #   sm (Single Match): The expected match result
  18 #   op (Operation): (0 => ==), (1 => !=)
  19 def check_single_match(dut, sm, op):
  20     out_sm = yield dut.single_match
  21     assert_op("Single Match", out_sm, sm, op)
  22
  23 # Checks the multiple match of the AddressEncoder
  24 # Arguments:
  25 #   dut: The AddressEncoder being tested
  26 #   mm (Multiple Match): The expected match result
  27 #   op (Operation): (0 => ==), (1 => !=)
  28 def check_multiple_match(dut, mm, op):
  29     out_mm = yield dut.multiple_match
  30     assert_op("Multiple Match", out_mm, mm, op)
  31
  32 # Checks the output of the AddressEncoder
  33 # Arguments:
  34 #   dut: The AddressEncoder being tested
  35 #   o (Output): The expected output
  36 #   op (Operation): (0 => ==), (1 => !=)
  37 def check_output(dut, o, op):
  38     out_o = yield dut.o
  39     assert_op("Output", out_o, o, op)
  40
  41 # Checks the state of the AddressEncoder
  42 # Arguments:
  43 #   dut: The AddressEncoder being tested
  44 #   sm (Single Match): The expected match result
  45 #   mm (Multiple Match): The expected match result
  46 #   o (Output): The expected output
  47 #   ss_op (Operation): Operation for the match assertion (0 => ==), (1 => !=)
  48 #   mm_op (Operation): Operation for the match assertion (0 => ==), (1 => !=)
  49 #   o_op (Operation): Operation for the match assertion (0 => ==), (1 => !=)
  50 def check_all(dut, sm, mm, o, sm_op, mm_op, o_op):
  51     yield from check_single_match(dut, sm, sm_op)
  52     yield from check_multiple_match(dut, mm, mm_op)
  53     yield from check_output(dut, o, o_op)
  54
  55 def tbench(dut):
  56     # Check invalid input
  57     in_val = 0b000
  58     single_match = 0
  59     multiple_match = 0
  60     output = 0
  61     yield from set_encoder(dut, in_val)
  62     yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
  63
  64     # Check single bit
  65     in_val = 0b001
  66     single_match = 1
  67     multiple_match = 0
  68     output = 0
  69     yield from set_encoder(dut, in_val)
  70     yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
  71
  72     # Check another single bit
  73     in_val = 0b100
  74     single_match = 1
  75     multiple_match = 0
  76     output = 2
  77     yield from set_encoder(dut, in_val)
  78     yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
  79
  80     # Check multiple match
  81     # We expected the lowest bit to be returned which is address 0
  82     in_val = 0b101
  83     single_match = 0
  84     multiple_match = 1
  85     output = 0
  86     yield from set_encoder(dut, in_val)
  87     yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
  88
  89     # Check another multiple match
  90     # We expected the lowest bit to be returned which is address 1
  91     in_val = 0b110
  92     single_match = 0
  93     multiple_match = 1
  94     output = 1
  95     yield from set_encoder(dut, in_val)
  96     yield from check_all(dut, single_match, multiple_match, output, 0, 0, 0)
  97
  98 def test_addr():
  99     dut = AddressEncoder(4)
 100     run_simulation(dut, tbench(dut),
 101                    vcd_name="Waveforms/test_address_encoder.vcd")
 102     print("AddressEncoder Unit Test Success")
 103
 104 if __name__ == "__main__":
 105     test_addr()