src/add/fmul.py

   1 from nmigen import Module, Signal
   2 from nmigen.cli import main, verilog
   3
   4 from fpbase import FPNum, FPOp, Overflow, FPBase
   5
   6
   7 class FPMUL(FPBase):
   8
   9     def __init__(self, width):
  10         FPBase.__init__(self)
  11         self.width = width
  12
  13         self.in_a  = FPOp(width)
  14         self.in_b  = FPOp(width)
  15         self.out_z = FPOp(width)
  16
  17     def get_fragment(self, platform=None):
  18         """ creates the HDL code-fragment for FPMUL
  19         """
  20         m = Module()
  21
  22         # Latches
  23         a = FPNum(self.width)
  24         b = FPNum(self.width)
  25         z = FPNum(self.width, False)
  26
  27         tot = Signal(28)     # sticky/round/guard bits, 23 result, 1 overflow
  28
  29         of = Overflow()
  30
  31         with m.FSM() as fsm:
  32
  33                 with m.State("get_a"):
  34                         m.next += "get_b"
  35                         m.d.sync += s.in_a.ack.eq(1)
  36                         with m.If(s.in_a.ack & in_a.stb):
  37                                 m.d.sync += [
  38                                 a.eq(in_a),
  39                                 s.in_a.ack(0)
  40                         ]
  41
  42                 with m.State("get_b"):
  43                         m.next += "unpack"
  44                         m.d.sync += s.in_b.ack.eq(1)
  45                         with m.If(s.in_b.ack & in_b.stb):
  46                                 m.d.sync += [
  47                                 b.eq(in_b),
  48                                 s.in_b.ack(0)
  49                         ]
  50
  51                 with m.State("unpack"):
  52                         m.next += "special_cases"
  53                         m.d.sync += [
  54                         a.m.eq(a[0:22]),
  55                         b.m.eq(b[0:22]),
  56                         a.e.eq(a[23:31] - 127),
  57                         b.e.eq(b[23:31] - 127),
  58                         a.s.eq(a[31]),
  59                         b.s.eq(b[31])
  60                         ]
  61
  62                 with m.State("special_cases"):
  63                         m.next = "normalise_a"
  64                         #if a or b is NaN return NaN
  65                         with m.If(a.is_nan() | b.is_nan()):
  66                                 m.next += "put_z"
  67                                 m.d.sync += z.nan(1)
  68                         #if a is inf return inf
  69                         with m.Elif(a.is_inf()):
  70                                 m.next += "put_z"
  71                                 m.d.sync += z.inf(0)
  72                         #if b is zero return NaN
  73                         with m.If(b.is_zero()):
  74                                 m.d.sync += z.nan(1)
  75                         #if b is inf return inf
  76                         with m.Elif(b.is_inf()):
  77                                 m.next += "put_z"
  78                                 m.d.sync += z.inf(0)
  79
  80
  81
  82 """
  83 special_cases:
  84       begin
  85         //if a is NaN or b is NaN return NaN
  86         if ((a_e == 128 && a_m != 0) || (b_e == 128 && b_m != 0)) begin
  87           z[31] <= 1;
  88           z[30:23] <= 255;
  89           z[22] <= 1;
  90           z[21:0] <= 0;
  91           state <= put_z;
  92         //if a is inf return inf
  93         end else if (a_e == 128) begin
  94           z[31] <= a_s ^ b_s;
  95           z[30:23] <= 255;
  96           z[22:0] <= 0;
  97           //if b is zero return NaN
  98           if (($signed(b_e) == -127) && (b_m == 0)) begin
  99             z[31] <= 1;
 100             z[30:23] <= 255;
 101             z[22] <= 1;
 102             z[21:0] <= 0;
 103           end
 104           state <= put_z;
 105         //if b is inf return inf
 106         end else if (b_e == 128) begin
 107           z[31] <= a_s ^ b_s;
 108           z[30:23] <= 255;
 109           z[22:0] <= 0;
 110           //if a is zero return NaN
 111           if (($signed(a_e) == -127) && (a_m == 0)) begin
 112             z[31] <= 1;
 113             z[30:23] <= 255;
 114             z[22] <= 1;
 115             z[21:0] <= 0;
 116           end
 117           state <= put_z;
 118         //if a is zero return zero
 119         end else if (($signed(a_e) == -127) && (a_m == 0)) begin
 120           z[31] <= a_s ^ b_s;
 121           z[30:23] <= 0;
 122           z[22:0] <= 0;
 123           state <= put_z;
 124         //if b is zero return zero
 125         end else if (($signed(b_e) == -127) && (b_m == 0)) begin
 126           z[31] <= a_s ^ b_s;
 127           z[30:23] <= 0;
 128           z[22:0] <= 0;
 129           state <= put_z;
 130         end else begin
 131           //Denormalised Number
 132           if ($signed(a_e) == -127) begin
 133             a_e <= -126;
 134           end else begin
 135             a_m[23] <= 1;
 136           end
 137           //Denormalised Number
 138           if ($signed(b_e) == -127) begin
 139             b_e <= -126;
 140           end else begin
 141             b_m[23] <= 1;
 142           end
 143           state <= normalise_a;
 144         end
 145       end
 146
 147       normalise_a:
 148       begin
 149         if (a_m[23]) begin
 150           state <= normalise_b;
 151         end else begin
 152           a_m <= a_m << 1;
 153           a_e <= a_e - 1;
 154         end
 155       end
 156
 157       normalise_b:
 158       begin
 159         if (b_m[23]) begin
 160           state <= multiply_0;
 161         end else begin
 162           b_m <= b_m << 1;
 163           b_e <= b_e - 1;
 164         end
 165       end
 166
 167       multiply_0:
 168       begin
 169         z_s <= a_s ^ b_s;
 170         z_e <= a_e + b_e + 1;
 171         product <= a_m * b_m * 4;
 172         state <= multiply_1;
 173       end
 174
 175       multiply_1:
 176       begin
 177         z_m <= product[49:26];
 178         guard <= product[25];
 179         round_bit <= product[24];
 180         sticky <= (product[23:0] != 0);
 181         state <= normalise_1;
 182       end
 183
 184       normalise_1:
 185       begin
 186         if (z_m[23] == 0) begin
 187           z_e <= z_e - 1;
 188           z_m <= z_m << 1;
 189           z_m[0] <= guard;
 190           guard <= round_bit;
 191           round_bit <= 0;
 192         end else begin
 193           state <= normalise_2;
 194         end
 195       end
 196
 197       normalise_2:
 198       begin
 199         if ($signed(z_e) < -126) begin
 200           z_e <= z_e + 1;
 201           z_m <= z_m >> 1;
 202           guard <= z_m[0];
 203           round_bit <= guard;
 204           sticky <= sticky | round_bit;
 205         end else begin
 206           state <= round;
 207         end
 208       end
 209
 210       round:
 211       begin
 212         if (guard && (round_bit | sticky | z_m[0])) begin
 213           z_m <= z_m + 1;
 214           if (z_m == 24'hffffff) begin
 215             z_e <=z_e + 1;
 216           end
 217         end
 218         state <= pack;
 219       end
 220
 221       pack:
 222       begin
 223         z[22 : 0] <= z_m[22:0];
 224         z[30 : 23] <= z_e[7:0] + 127;
 225         z[31] <= z_s;
 226         if ($signed(z_e) == -126 && z_m[23] == 0) begin
 227           z[30 : 23] <= 0;
 228         end
 229         //if overflow occurs, return inf
 230         if ($signed(z_e) > 127) begin
 231           z[22 : 0] <= 0;
 232           z[30 : 23] <= 255;
 233           z[31] <= z_s;
 234         end
 235         state <= put_z;
 236       end
 237
 238       put_z:
 239       begin
 240         s_output_z_stb <= 1;
 241         s_output_z <= z;
 242         if (s_output_z_stb && output_z_ack) begin
 243           s_output_z_stb <= 0;
 244           state <= get_a;
 245         end
 246 end
 247
 248 """