Add decoder/test for minor_19 field
[soc.git] / src / decoder / power_enums.py
1 from enum import Enum, unique
2 import csv
3 import os
4 import requests
5
6
7 def get_csv(name):
8 file_dir = os.path.dirname(os.path.realpath(__file__))
9 file_path = os.path.join(file_dir, name)
10 if not os.path.isfile(file_path):
11 url = 'https://libre-riscv.org/openpower/isatables/' + name
12 r = requests.get(url, allow_redirects=True)
13 with open(file_path, 'w') as outfile:
14 outfile.write(r.content.decode("utf-8"))
15 with open(file_path, 'r') as csvfile:
16 reader = csv.DictReader(csvfile)
17 return list(reader)
18
19
20 # names of the fields in the tables that don't correspond to an enum
21 single_bit_flags = ['CR in', 'CR out', 'inv A', 'inv out',
22 'cry out', 'BR', 'sgn ext', 'upd', 'rsrv', '32b',
23 'sgn', 'lk', 'sgl pipe']
24
25
26 def get_signal_name(name):
27 return name.lower().replace(' ', '_')
28
29
30 @unique
31 class Function(Enum):
32 ALU = 0
33 LDST = 1
34
35
36 @unique
37 class InternalOp(Enum):
38 OP_ADD = 0
39 OP_AND = 1
40 OP_B = 2
41 OP_BC = 3
42 OP_CMP = 4
43 OP_LOAD = 5
44 OP_MUL_L64 = 6
45 OP_OR = 7
46 OP_RLC = 8
47 OP_STORE = 9
48 OP_TDI = 10
49 OP_XOR = 11
50 OP_MCRF = 12
51 OP_BCREG = 13
52 OP_ISYNC = 14
53 OP_ILLEGAL = 15
54
55
56 @unique
57 class In1Sel(Enum):
58 RA = 0
59 RA_OR_ZERO = 1
60 NONE = 2
61 SPR = 3
62
63
64 @unique
65 class In2Sel(Enum):
66 CONST_SI = 0
67 CONST_SI_HI = 1
68 CONST_UI = 2
69 CONST_UI_HI = 3
70 CONST_LI = 4
71 CONST_BD = 5
72 CONST_SH32 = 6
73 RB = 7
74 NONE = 8
75 SPR = 9
76
77
78 @unique
79 class In3Sel(Enum):
80 NONE = 0
81 RS = 1
82
83
84 @unique
85 class OutSel(Enum):
86 RT = 0
87 RA = 1
88 NONE = 2
89 SPR = 3
90
91
92 @unique
93 class LdstLen(Enum):
94 NONE = 0
95 is1B = 1
96 is2B = 2
97 is4B = 3
98
99
100 @unique
101 class RC(Enum):
102 NONE = 0
103 ONE = 1
104 RC = 2
105
106
107 @unique
108 class CryIn(Enum):
109 ZERO = 0
110 ONE = 1
111 CA = 2