1 from nmigen
import (Module
, Signal
, Cat
, Const
, Mux
, Repl
, signed
,
3 from nmigen
.cli
import main
, verilog
5 from ieee754
.fpcommon
.fpbase
import FPNumDecode
, FPNumBaseRecord
7 from nmutil
.pipemodbase
import PipeModBase
8 from ieee754
.fpcommon
.basedata
import FPBaseData
9 from ieee754
.fpcommon
.denorm
import FPSCData
10 from ieee754
.cordic
.fp_pipe_data
import CordicInitialData
13 class FPCordicInitStage(PipeModBase
):
14 def __init__(self
, pspec
):
15 super().__init
__(pspec
, "specialcases")
18 return FPBaseData(self
.pspec
)
21 return FPSCData(self
.pspec
, False)
23 def elaborate(self
, platform
):
28 width
= self
.pspec
.width
29 a1
= FPNumBaseRecord(width
, False)
30 m
.submodules
.sc_decode_a
= a1
= FPNumDecode(None, a1
)
31 comb
+= [a1
.v
.eq(self
.i
.a
),
35 # pass through context
36 comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)
41 class FPCordicConvertFixed(PipeModBase
):
42 def __init__(self
, pspec
):
43 super().__init
__(pspec
, "tofixed")
46 return FPSCData(self
.pspec
, False)
49 return CordicInitialData(self
.pspec
)
51 def elaborate(self
, platform
):
55 shifter
= Signal(self
.i
.a
.e
.width
)
56 comb
+= shifter
.eq(-self
.i
.a
.e
)
58 z_intermed
= Signal(unsigned(self
.o
.z0
.width
))
59 z_shifted
= Signal(signed(self
.o
.z0
.width
))
60 comb
+= z_intermed
.eq(Cat(Repl(0, self
.pspec
.fracbits
-
63 comb
+= z_shifted
.eq(z_intermed
>> shifter
)
64 comb
+= self
.o
.z0
.eq(Mux(self
.i
.a
.s
,