src/ieee754/fpadd/fadd_state.py

   1 # IEEE Floating Point Adder (Single Precision)
   2 # Copyright (C) Jonathan P Dawson 2013
   3 # 2013-12-12
   4
   5 from nmigen import Module, Signal, Cat, Elaboratable
   6 from nmigen.cli import main, verilog
   7
   8 from ieee754.fpcommon.fpbase import (FPNumIn, FPNumOut, FPOpIn,
   9                                      FPOpOut, Overflow, FPBase,
  10                                      FPNumBaseRecord)
  11
  12 from nmutil.nmoperator import eq
  13
  14
  15 class FPADD(FPBase, Elaboratable):
  16
  17     def __init__(self, width, single_cycle=False):
  18         FPBase.__init__(self)
  19         self.width = width
  20         self.single_cycle = single_cycle
  21
  22         self.in_a  = FPOpIn(width)
  23         self.in_a.data_i = Signal(width)
  24         self.in_b  = FPOpIn(width)
  25         self.in_b.data_i = Signal(width)
  26         self.out_z = FPOpOut(width)
  27         self.out_z.data_o = Signal(width)
  28
  29     def elaborate(self, platform=None):
  30         """ creates the HDL code-fragment for FPAdd
  31         """
  32         m = Module()
  33
  34         # Latches
  35         a = FPNumBaseRecord(self.width, False)
  36         b = FPNumBaseRecord(self.width, False)
  37         z = FPNumBaseRecord(self.width, False)
  38         a = FPNumIn(None, a)
  39         b = FPNumIn(None, b)
  40         z = FPNumOut(z)
  41
  42         m.submodules.fpnum_a = a
  43         m.submodules.fpnum_b = b
  44         m.submodules.fpnum_z = z
  45
  46         m.d.comb += a.v.eq(self.in_a.v)
  47         m.d.comb += b.v.eq(self.in_b.v)
  48
  49         w = z.m_width + 4 # sticky/round/guard, {mantissa} result, 1 overflow
  50         tot = Signal(w, reset_less=True)
  51
  52         of = Overflow()
  53
  54         with m.FSM() as fsm:
  55
  56             # ******
  57             # gets operand a
  58
  59             with m.State("get_a"):
  60                 res = self.get_op(m, self.in_a, a, "get_b")
  61                 m.d.sync += eq([a, self.in_a.ready_o], res)
  62
  63             # ******
  64             # gets operand b
  65
  66             with m.State("get_b"):
  67                 res = self.get_op(m, self.in_b, b, "special_cases")
  68                 m.d.sync += eq([b, self.in_b.ready_o], res)
  69
  70             # ******
  71             # special cases: NaNs, infs, zeros, denormalised
  72             # NOTE: some of these are unique to add.  see "Special Operations"
  73             # https://steve.hollasch.net/cgindex/coding/ieeefloat.html
  74
  75             with m.State("special_cases"):
  76
  77                 s_nomatch = Signal()
  78                 m.d.comb += s_nomatch.eq(a.s != b.s)
  79
  80                 m_match = Signal()
  81                 m.d.comb += m_match.eq(a.m == b.m)
  82
  83                 # if a is NaN or b is NaN return NaN
  84                 with m.If(a.is_nan | b.is_nan):
  85                     m.next = "put_z"
  86                     m.d.sync += z.nan(1)
  87
  88                 # XXX WEIRDNESS for FP16 non-canonical NaN handling
  89                 # under review
  90
  91                 ## if a is zero and b is NaN return -b
  92                 #with m.If(a.is_zero & (a.s==0) & b.is_nan):
  93                 #    m.next = "put_z"
  94                 #    m.d.sync += z.create(b.s, b.e, Cat(b.m[3:-2], ~b.m[0]))
  95
  96                 ## if b is zero and a is NaN return -a
  97                 #with m.Elif(b.is_zero & (b.s==0) & a.is_nan):
  98                 #    m.next = "put_z"
  99                 #    m.d.sync += z.create(a.s, a.e, Cat(a.m[3:-2], ~a.m[0]))
 100
 101                 ## if a is -zero and b is NaN return -b
 102                 #with m.Elif(a.is_zero & (a.s==1) & b.is_nan):
 103                 #    m.next = "put_z"
 104                 #    m.d.sync += z.create(a.s & b.s, b.e, Cat(b.m[3:-2], 1))
 105
 106                 ## if b is -zero and a is NaN return -a
 107                 #with m.Elif(b.is_zero & (b.s==1) & a.is_nan):
 108                 #    m.next = "put_z"
 109                 #    m.d.sync += z.create(a.s & b.s, a.e, Cat(a.m[3:-2], 1))
 110
 111                 # if a is inf return inf (or NaN)
 112                 with m.Elif(a.is_inf):
 113                     m.next = "put_z"
 114                     m.d.sync += z.inf(a.s)
 115                     # if a is inf and signs don't match return NaN
 116                     with m.If(b.exp_128 & s_nomatch):
 117                         m.d.sync += z.nan(1)
 118
 119                 # if b is inf return inf
 120                 with m.Elif(b.is_inf):
 121                     m.next = "put_z"
 122                     m.d.sync += z.inf(b.s)
 123
 124                 # if a is zero and b zero return signed-a/b
 125                 with m.Elif(a.is_zero & b.is_zero):
 126                     m.next = "put_z"
 127                     m.d.sync += z.create(a.s & b.s, b.e, b.m[3:-1])
 128
 129                 # if a is zero return b
 130                 with m.Elif(a.is_zero):
 131                     m.next = "put_z"
 132                     m.d.sync += z.create(b.s, b.e, b.m[3:-1])
 133
 134                 # if b is zero return a
 135                 with m.Elif(b.is_zero):
 136                     m.next = "put_z"
 137                     m.d.sync += z.create(a.s, a.e, a.m[3:-1])
 138
 139                 # if a equal to -b return zero (+ve zero)
 140                 with m.Elif(s_nomatch & m_match & (a.e == b.e)):
 141                     m.next = "put_z"
 142                     m.d.sync += z.zero(0)
 143
 144                 # Denormalised Number checks
 145                 with m.Else():
 146                     m.next = "align"
 147                     self.denormalise(m, a)
 148                     self.denormalise(m, b)
 149
 150             # ******
 151             # align.
 152
 153             with m.State("align"):
 154                 if not self.single_cycle:
 155                     # NOTE: this does *not* do single-cycle multi-shifting,
 156                     #       it *STAYS* in the align state until exponents match
 157
 158                     # exponent of a greater than b: shift b down
 159                     with m.If(a.e > b.e):
 160                         m.d.sync += b.shift_down(b)
 161                     # exponent of b greater than a: shift a down
 162                     with m.Elif(a.e < b.e):
 163                         m.d.sync += a.shift_down(a)
 164                     # exponents equal: move to next stage.
 165                     with m.Else():
 166                         m.next = "add_0"
 167                 else:
 168                     # This one however (single-cycle) will do the shift
 169                     # in one go.
 170
 171                     # XXX TODO: the shifter used here is quite expensive
 172                     # having only one would be better
 173
 174                     ediff = Signal((len(a.e), True), reset_less=True)
 175                     ediffr = Signal((len(a.e), True), reset_less=True)
 176                     m.d.comb += ediff.eq(a.e - b.e)
 177                     m.d.comb += ediffr.eq(b.e - a.e)
 178                     with m.If(ediff > 0):
 179                         m.d.sync += b.shift_down_multi(ediff)
 180                     # exponent of b greater than a: shift a down
 181                     with m.Elif(ediff < 0):
 182                         m.d.sync += a.shift_down_multi(ediffr)
 183
 184                     m.next = "add_0"
 185
 186             # ******
 187             # First stage of add.  covers same-sign (add) and subtract
 188             # special-casing when mantissas are greater or equal, to
 189             # give greatest accuracy.
 190
 191             with m.State("add_0"):
 192                 m.next = "add_1"
 193                 m.d.sync += z.e.eq(a.e)
 194                 # same-sign (both negative or both positive) add mantissas
 195                 with m.If(a.s == b.s):
 196                     m.d.sync += [
 197                         tot.eq(Cat(a.m, 0) + Cat(b.m, 0)),
 198                         z.s.eq(a.s)
 199                     ]
 200                 # a mantissa greater than b, use a
 201                 with m.Elif(a.m >= b.m):
 202                     m.d.sync += [
 203                         tot.eq(Cat(a.m, 0) - Cat(b.m, 0)),
 204                         z.s.eq(a.s)
 205                     ]
 206                 # b mantissa greater than a, use b
 207                 with m.Else():
 208                     m.d.sync += [
 209                         tot.eq(Cat(b.m, 0) - Cat(a.m, 0)),
 210                         z.s.eq(b.s)
 211                 ]
 212
 213             # ******
 214             # Second stage of add: preparation for normalisation.
 215             # detects when tot sum is too big (tot[27] is kinda a carry bit)
 216
 217             with m.State("add_1"):
 218                 m.next = "normalise_1"
 219                 # tot[27] gets set when the sum overflows. shift result down
 220                 with m.If(tot[-1]):
 221                     m.d.sync += [
 222                         z.m.eq(tot[4:]),
 223                         of.m0.eq(tot[4]),
 224                         of.guard.eq(tot[3]),
 225                         of.round_bit.eq(tot[2]),
 226                         of.sticky.eq(tot[1] | tot[0]),
 227                         z.e.eq(z.e + 1)
 228                 ]
 229                 # tot[27] zero case
 230                 with m.Else():
 231                     m.d.sync += [
 232                         z.m.eq(tot[3:]),
 233                         of.m0.eq(tot[3]),
 234                         of.guard.eq(tot[2]),
 235                         of.round_bit.eq(tot[1]),
 236                         of.sticky.eq(tot[0])
 237                 ]
 238
 239             # ******
 240             # First stage of normalisation.
 241
 242             with m.State("normalise_1"):
 243                 self.normalise_1(m, z, of, "normalise_2")
 244
 245             # ******
 246             # Second stage of normalisation.
 247
 248             with m.State("normalise_2"):
 249                 self.normalise_2(m, z, of, "round")
 250
 251             # ******
 252             # rounding stage
 253
 254             with m.State("round"):
 255                 self.roundz(m, z, of.roundz)
 256                 m.next = "corrections"
 257
 258             # ******
 259             # correction stage
 260
 261             with m.State("corrections"):
 262                 self.corrections(m, z, "pack")
 263
 264             # ******
 265             # pack stage
 266
 267             with m.State("pack"):
 268                 self.pack(m, z, "put_z")
 269
 270             # ******
 271             # put_z stage
 272
 273             with m.State("put_z"):
 274                 self.put_z(m, z, self.out_z, "get_a")
 275
 276         return m
 277
 278
 279 if __name__ == "__main__":
 280     alu = FPADD(width=32)
 281     main(alu, ports=alu.in_a.ports() + alu.in_b.ports() + alu.out_z.ports())
 282
 283
 284     # works... but don't use, just do "python fname.py convert -t v"
 285     #print (verilog.convert(alu, ports=[
 286     #                        ports=alu.in_a.ports() + \
 287     #                              alu.in_b.ports() + \
 288     #                              alu.out_z.ports())