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[ieee754fpu.git] / src / ieee754 / fpcommon / basedata.py
1 # IEEE Floating Point Adder (Single Precision)
2 # Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
3
4 from nmigen import Signal
5 from ieee754.fpcommon.fpbase import FPRoundingMode
6 from ieee754.fpcommon.getop import FPPipeContext
7
8
9 class FPBaseData:
10
11 def __init__(self, pspec):
12 width = pspec.width
13 n_ops = pspec.n_ops
14 self.ctx = FPPipeContext(pspec)
15 ops = []
16 for i in range(n_ops):
17 name = chr(ord("a")+i)
18 operand = Signal(width, name=name)
19 setattr(self, name, operand)
20 ops.append(operand)
21 self.muxid = self.ctx.muxid # make muxid available here: complicated
22 self.ops = ops
23
24 self.rm = Signal(FPRoundingMode, reset=FPRoundingMode.DEFAULT)
25 """rounding mode"""
26
27 def eq(self, i):
28 ret = []
29 for op1, op2 in zip(self.ops, i.ops):
30 ret.append(op1.eq(op2))
31 ret.append(self.ctx.eq(i.ctx))
32 ret.append(self.rm.eq(i.rm))
33 return ret
34
35 def __iter__(self):
36 if self.ops:
37 yield from self.ops
38 yield from self.ctx
39 yield self.rm
40
41 def ports(self):
42 return list(self)
43
44