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[ieee754fpu.git] / src / ieee754 / fpcommon / pscdata.py
1 """IEEE754 Floating Point Library
2
3 Copyright (C) 2019 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
4
5 """
6
7 from nmigen import Signal
8 from ieee754.fpcommon.fpbase import FPNumBaseRecord, FPRoundingMode
9 from ieee754.fpcommon.getop import FPPipeContext
10
11
12 class FPSCData:
13
14 def __init__(self, pspec, m_extra):
15 width = pspec.width
16 # NOTE: difference between z and oz is that oz is created by
17 # special-cases module(s) and will propagate, along with its
18 # "bypass" signal out_do_z, through the pipeline, *disabling*
19 # all processing of all subsequent stages.
20 self.a = FPNumBaseRecord(width, m_extra, name="a") # operand a
21 self.b = FPNumBaseRecord(width, m_extra, name="b") # operand b
22 self.z = FPNumBaseRecord(width, False, name="z") # denormed result
23 self.oz = Signal(width, reset_less=True) # "finished" (bypass) result
24 self.out_do_z = Signal(reset_less=True) # "bypass" enabled
25 self.ctx = FPPipeContext(pspec)
26 self.muxid = self.ctx.muxid
27
28 self.rm = Signal(FPRoundingMode, reset=FPRoundingMode.DEFAULT)
29 """rounding mode"""
30
31 def __iter__(self):
32 yield from self.a
33 yield from self.b
34 yield from self.z
35 yield self.oz
36 yield self.out_do_z
37 yield from self.ctx
38 yield self.rm
39
40 def eq(self, i):
41 ret = [self.z.eq(i.z), self.out_do_z.eq(i.out_do_z), self.oz.eq(i.oz),
42 self.a.eq(i.a), self.b.eq(i.b), self.ctx.eq(i.ctx),
43 self.rm.eq(i.rm)]
44 return ret