1 # IEEE Floating Point Divider
3 from nmigen
import Module
4 from nmigen
.cli
import main
, verilog
6 from nmutil
.singlepipe
import (StageChain
, SimpleHandshake
)
8 from ieee754
.fpcommon
.fpbase
import FPState
9 from ieee754
.fpcommon
.denorm
import FPSCData
10 from ieee754
.fpcommon
.postcalc
import FPAddStage1Data
13 from .div0
import FPDivStage0Mod
14 from .div1
import FPDivStage1Mod
17 class FPDivStages(FPState
, SimpleHandshake
):
19 def __init__(self
, width
, id_wid
):
20 FPState
.__init
__(self
, "align")
23 SimpleHandshake
.__init
__(self
, self
) # pipeline is its own stage
24 self
.m1o
= self
.ospec()
27 return FPSCData(self
.width
, self
.id_wid
, False)
30 return FPAddStage1Data(self
.width
, self
.id_wid
) # AddStage1 ospec
32 def setup(self
, m
, i
):
33 """ links module to inputs and outputs
36 # chain DivStage0 and DivStage1
37 m0mod
= FPDivStage0Mod(self
.width
, self
.id_wid
)
38 m1mod
= FPDivStage1Mod(self
.width
, self
.id_wid
)
40 chain
= StageChain([m0mod
, m1mod
])
49 m
.d
.sync
+= self
.m1o
.eq(self
.process(None))
50 m
.next
= "normalise_1"