src/ieee754/fpdiv/pipeline.py

   1 # IEEE Floating Point Divider Pipeline
   2
   3 from nmigen import Module
   4 from nmigen.cli import main, verilog
   5
   6 from nmutil.singlepipe import ControlBase
   7 from nmutil.concurrentunit import ReservationStations, num_bits
   8
   9 from ieee754.fpcommon.getop import FPADDBaseData
  10 from ieee754.fpcommon.denorm import FPSCData
  11 from ieee754.fpcommon.pack import FPPackData
  12 from ieee754.fpcommon.normtopack import FPNormToPack
  13 from .specialcases import FPDIVSpecialCasesDeNorm
  14 from .divstages import FPDivStages
  15
  16
  17
  18 class FPDIVBasePipe(ControlBase):
  19     def __init__(self, width, id_wid):
  20         ControlBase.__init__(self)
  21         self.pipestart = FPDIVSpecialCasesDeNorm(width, id_wid)
  22         pipechain = []
  23         n_stages = 6 # TODO
  24         n_combinatorial_stages = 2 # TODO
  25         for i in range(n_stages):
  26             begin = i == 0 # needs to convert input from pipestart ospec
  27             end = i == n_stages - 1 # needs to convert output to pipeend ispec
  28             pipechain.append(FPDivStages(width, id_wid,
  29                                          n_combinatorial_stages,
  30                                          begin, end))
  31         self.pipechain = pipechain
  32         self.pipeend = FPNormToPack(width, id_wid)
  33
  34         self._eqs = self.connect([self.pipestart] + pipechain + [self.pipeend])
  35
  36     def elaborate(self, platform):
  37         m = ControlBase.elaborate(self, platform)
  38         m.submodules.scnorm = self.pipestart
  39         for i, p in enumerate(self.pipechain):
  40             setattr(m.submodules, "pipediv%d" % i, p)
  41         m.submodules.normpack = self.pipeend
  42         m.d.comb += self._eqs
  43         return m
  44
  45
  46 class FPDIVMuxInOut(ReservationStations):
  47     """ Reservation-Station version of FPDIV pipeline.
  48
  49         * fan-in on inputs (an array of FPADDBaseData: a,b,mid)
  50         * N-stage divider pipeline
  51         * fan-out on outputs (an array of FPPackData: z,mid)
  52
  53         Fan-in and Fan-out are combinatorial.
  54     """
  55     def __init__(self, width, num_rows):
  56         self.width = width
  57         self.id_wid = num_bits(width)
  58         self.alu = FPDIVBasePipe(width, self.id_wid)
  59         ReservationStations.__init__(self, num_rows)
  60
  61     def i_specfn(self):
  62         return FPADDBaseData(self.width, self.id_wid)
  63
  64     def o_specfn(self):
  65         return FPPackData(self.width, self.id_wid)