remove i_specfn and o_specfn from FP*MuxInOut, use self.alu.ispec() and ospec()
[ieee754fpu.git] / src / nmutil / concurrentunit.py
1 """ concurrent unit from mitch alsup augmentations to 6600 scoreboard
2
3 * data fans in
4 * data goes through a pipeline
5 * results fan back out.
6
7 the output data format has to have a member "muxid", which is used
8 as the array index on fan-out
9 """
10
11 from math import log
12 from nmigen import Module, Elaboratable
13 from nmigen.cli import main, verilog
14
15 from nmutil.singlepipe import PassThroughStage
16 from nmutil.multipipe import CombMuxOutPipe
17 from nmutil.multipipe import PriorityCombMuxInPipe
18
19
20 def num_bits(n):
21 return int(log(n) / log(2))
22
23
24 class FPADDInMuxPipe(PriorityCombMuxInPipe):
25 def __init__(self, num_rows, iospecfn):
26 self.num_rows = num_rows
27 stage = PassThroughStage(iospecfn)
28 PriorityCombMuxInPipe.__init__(self, stage, p_len=self.num_rows)
29
30
31 class FPADDMuxOutPipe(CombMuxOutPipe):
32 def __init__(self, num_rows, iospecfn):
33 self.num_rows = num_rows
34 stage = PassThroughStage(iospecfn)
35 CombMuxOutPipe.__init__(self, stage, n_len=self.num_rows)
36
37
38 class ReservationStations(Elaboratable):
39 """ Reservation-Station pipeline
40
41 Input: num_rows - number of input and output Reservation Stations
42
43 Requires: the addition of an "alu" object, from which ispec and ospec
44 are taken, and inpipe and outpipe are connected to it
45
46 * fan-in on inputs (an array of FPADDBaseData: a,b,mid)
47 * ALU pipeline
48 * fan-out on outputs (an array of FPPackData: z,mid)
49
50 Fan-in and Fan-out are combinatorial.
51 """
52 def __init__(self, num_rows):
53 self.num_rows = num_rows
54 self.inpipe = FPADDInMuxPipe(num_rows, self.i_specfn) # fan-in
55 self.outpipe = FPADDMuxOutPipe(num_rows, self.o_specfn) # fan-out
56
57 self.p = self.inpipe.p # kinda annoying,
58 self.n = self.outpipe.n # use pipe in/out as this class in/out
59 self._ports = self.inpipe.ports() + self.outpipe.ports()
60
61 def elaborate(self, platform):
62 m = Module()
63 m.submodules.inpipe = self.inpipe
64 m.submodules.alu = self.alu
65 m.submodules.outpipe = self.outpipe
66
67 m.d.comb += self.inpipe.n.connect_to_next(self.alu.p)
68 m.d.comb += self.alu.connect_to_next(self.outpipe)
69
70 return m
71
72 def ports(self):
73 return self._ports
74
75 def i_specfn(self):
76 return self.alu.ispec()
77
78 def o_specfn(self):
79 return self.alu.ospec()